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| author | Alex Deucher <alexander.deucher@amd.com> | 2014-06-25 19:32:36 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-08-05 08:53:24 -0400 |
| commit | f2c6b0f452c3804496f55655fda28c2809e1a58b (patch) | |
| tree | fcff3a4927d30bbbcbe084874c1a9a9008ba1f12 /drivers/gpu/drm/radeon/ci_smc.c | |
| parent | 629bd33c75196ca89625148614e9e34b42f4f460 (diff) | |
| download | linux-stable-f2c6b0f452c3804496f55655fda28c2809e1a58b.tar.gz linux-stable-f2c6b0f452c3804496f55655fda28c2809e1a58b.tar.bz2 linux-stable-f2c6b0f452c3804496f55655fda28c2809e1a58b.zip | |
drm/radeon/cik: Add support for new ucode format (v5)
This adds CIK support for the new ucode format.
v2: add size validation, integrate debug info
v3: add support for MEC2 on KV
v4: fix typos
v4: update to latest format
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ci_smc.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/ci_smc.c | 39 |
1 files changed, 26 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/ci_smc.c b/drivers/gpu/drm/radeon/ci_smc.c index 8debc9d47362..b630edc2fd0c 100644 --- a/drivers/gpu/drm/radeon/ci_smc.c +++ b/drivers/gpu/drm/radeon/ci_smc.c @@ -213,24 +213,37 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) if (!rdev->smc_fw) return -EINVAL; - switch (rdev->family) { - case CHIP_BONAIRE: - ucode_start_address = BONAIRE_SMC_UCODE_START; - ucode_size = BONAIRE_SMC_UCODE_SIZE; - break; - case CHIP_HAWAII: - ucode_start_address = HAWAII_SMC_UCODE_START; - ucode_size = HAWAII_SMC_UCODE_SIZE; - break; - default: - DRM_ERROR("unknown asic in smc ucode loader\n"); - BUG(); + if (rdev->new_fw) { + const struct smc_firmware_header_v1_0 *hdr = + (const struct smc_firmware_header_v1_0 *)rdev->smc_fw->data; + + radeon_ucode_print_smc_hdr(&hdr->header); + + ucode_start_address = le32_to_cpu(hdr->ucode_start_addr); + ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes); + src = (const u8 *) + (rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); + } else { + switch (rdev->family) { + case CHIP_BONAIRE: + ucode_start_address = BONAIRE_SMC_UCODE_START; + ucode_size = BONAIRE_SMC_UCODE_SIZE; + break; + case CHIP_HAWAII: + ucode_start_address = HAWAII_SMC_UCODE_START; + ucode_size = HAWAII_SMC_UCODE_SIZE; + break; + default: + DRM_ERROR("unknown asic in smc ucode loader\n"); + BUG(); + } + + src = (const u8 *)rdev->smc_fw->data; } if (ucode_size & 3) return -EINVAL; - src = (const u8 *)rdev->smc_fw->data; spin_lock_irqsave(&rdev->smc_idx_lock, flags); WREG32(SMC_IND_INDEX_0, ucode_start_address); WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); |