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| author | David S. Miller <davem@davemloft.net> | 2008-11-06 22:43:03 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-11-06 22:43:03 -0800 |
| commit | 9eeda9abd1faf489f3df9a1f557975f4c8650363 (patch) | |
| tree | 3e0a58e25b776cfbee193195460324dccb1886c7 /drivers/gpu/drm/radeon/radeon_drv.h | |
| parent | 61c9eaf90081cbe6dc4f389e0056bff76eca19ec (diff) | |
| parent | 4bab0ea1d42dd1927af9df6fbf0003fc00617c50 (diff) | |
| download | linux-stable-9eeda9abd1faf489f3df9a1f557975f4c8650363.tar.gz linux-stable-9eeda9abd1faf489f3df9a1f557975f4c8650363.tar.bz2 linux-stable-9eeda9abd1faf489f3df9a1f557975f4c8650363.zip | |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/wireless/ath5k/base.c
net/8021q/vlan_core.c
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h index 4dbb813910c3..02f5575ba395 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.h +++ b/drivers/gpu/drm/radeon/radeon_drv.h @@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, * handling, not bus mastering itself. */ #define RADEON_BUS_CNTL 0x0030 -/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ +/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */ # define RADEON_BUS_MASTER_DIS (1 << 6) -/* rs400, rs690/rs740 */ -# define RS400_BUS_MASTER_DIS (1 << 14) -# define RS400_MSI_REARM (1 << 20) -/* see RS480_MSI_REARM in AIC_CNTL for rs480 */ +/* rs600/rs690/rs740 */ +# define RS600_BUS_MASTER_DIS (1 << 14) +# define RS600_MSI_REARM (1 << 20) +/* see RS400_MSI_REARM in AIC_CNTL for rs480 */ #define RADEON_BUS_CNTL1 0x0034 # define RADEON_PMI_BM_DIS (1 << 2) @@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, #define RADEON_AIC_CNTL 0x01d0 # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) -# define RS480_MSI_REARM (1 << 3) +# define RS400_MSI_REARM (1 << 3) #define RADEON_AIC_STAT 0x01d4 #define RADEON_AIC_PT_BASE 0x01d8 #define RADEON_AIC_LO_ADDR 0x01dc |