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author | Alex Deucher <alexander.deucher@amd.com> | 2014-09-23 09:37:37 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2014-10-01 09:00:05 -0400 |
commit | 186b1b2ba2a0684e3d2d3703427a993a3b35b16d (patch) | |
tree | 84c204617242ed519f5841e0456cf53af428b8da /drivers/gpu/drm/radeon/si_dpm.c | |
parent | 7bf05cc1628679756495f15c69cecc1fd31e7c78 (diff) | |
download | linux-stable-186b1b2ba2a0684e3d2d3703427a993a3b35b16d.tar.gz linux-stable-186b1b2ba2a0684e3d2d3703427a993a3b35b16d.tar.bz2 linux-stable-186b1b2ba2a0684e3d2d3703427a993a3b35b16d.zip |
drm/radeon/dpm: drop clk/voltage dependency filters for SI
Not sure this was ever necessary for SI, was just done
to be on the safe side.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69721
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index 70e61ffeace2..9e4d5d7d348f 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c @@ -2916,7 +2916,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, bool disable_sclk_switching = false; u32 mclk, sclk; u16 vddc, vddci; - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; int i; if ((rdev->pm.dpm.new_active_crtc_count > 1) || @@ -2950,29 +2949,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, } } - /* limit clocks to max supported clocks based on voltage dependency tables */ - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, - &max_sclk_vddc); - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, - &max_mclk_vddci); - btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, - &max_mclk_vddc); - - for (i = 0; i < ps->performance_level_count; i++) { - if (max_sclk_vddc) { - if (ps->performance_levels[i].sclk > max_sclk_vddc) - ps->performance_levels[i].sclk = max_sclk_vddc; - } - if (max_mclk_vddci) { - if (ps->performance_levels[i].mclk > max_mclk_vddci) - ps->performance_levels[i].mclk = max_mclk_vddci; - } - if (max_mclk_vddc) { - if (ps->performance_levels[i].mclk > max_mclk_vddc) - ps->performance_levels[i].mclk = max_mclk_vddc; - } - } - /* XXX validate the min clocks required for display */ if (disable_mclk_switching) { |