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authorMark Yao <mark.yao@rock-chips.com>2015-12-15 09:08:43 +0800
committerMark Yao <mark.yao@rock-chips.com>2015-12-28 09:01:41 +0800
commit1194fffbb102b1683bcbfc893df20bbf8a038468 (patch)
tree1ba24b57ca5850bba6c697d9cf44f0f20c2d593a /drivers/gpu/drm/rockchip/rockchip_vop_reg.c
parenta67719d182291bf62c6093545b9af27f0431cbeb (diff)
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drm/rockchip: vop: spilt scale regsters
There are two version scale control register found on vop, scale full version found on rk3288, support extension registers. and scale little version found on rk3036, only support common scale. Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Diffstat (limited to 'drivers/gpu/drm/rockchip/rockchip_vop_reg.c')
-rw-r--r--drivers/gpu/drm/rockchip/rockchip_vop_reg.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index d47bfc3f753a..6495114277e0 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -50,7 +50,7 @@ static const uint32_t formats_234[] = {
DRM_FORMAT_BGR565,
};
-static const struct vop_scl_regs win_full_scl = {
+static const struct vop_scl_extension win_full_ext = {
.cbcr_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 31),
.cbcr_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 30),
.cbcr_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 28),
@@ -72,6 +72,9 @@ static const struct vop_scl_regs win_full_scl = {
.cbcr_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 1),
.yrgb_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 0),
.lb_mode = VOP_REG(WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs win_full_scl = {
.scale_yrgb_x = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
.scale_yrgb_y = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
.scale_cbcr_x = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),