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| author | Mark Yao <mark.yao@rock-chips.com> | 2018-04-23 12:49:57 +0200 |
|---|---|---|
| committer | Andrzej Hajda <a.hajda@samsung.com> | 2018-04-24 08:34:47 +0200 |
| commit | 6bda8112fe9f62294f2f2b338c46a3476fc6e238 (patch) | |
| tree | 827dd4a346beaceba38cd9081ea6d8c96c68d770 /drivers/gpu/drm/rockchip/rockchip_vop_reg.c | |
| parent | 7bd0fd9850382252d906bfeb5abfb38aefe28a4f (diff) | |
| download | linux-stable-6bda8112fe9f62294f2f2b338c46a3476fc6e238.tar.gz linux-stable-6bda8112fe9f62294f2f2b338c46a3476fc6e238.tar.bz2 linux-stable-6bda8112fe9f62294f2f2b338c46a3476fc6e238.zip | |
drm/rockchip: pre dither down when output bpc is 8bit
Some encoder have a crc verification check, crc check fail if
input and output data is not equal.
That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.
So pre dither down vop data to 8bit if panel's bpc is 8.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
[seanpaul resolved conflict in rockchip_drm_vop.c]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180423105003.9004-22-enric.balletbo@collabora.com
Diffstat (limited to 'drivers/gpu/drm/rockchip/rockchip_vop_reg.c')
| -rw-r--r-- | drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 2e4eea3459fe..08023d3ecb76 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -264,6 +264,7 @@ static const struct vop_common rk3288_common = { .standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22), .gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23), .mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20), + .pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1), .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1), .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6), .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19), |