summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/tilcdc
diff options
context:
space:
mode:
authorJyri Sarha <jsarha@ti.com>2016-11-15 23:57:42 +0200
committerJyri Sarha <jsarha@ti.com>2016-11-30 14:19:44 +0200
commit274c34dbe756d441e2c1925465569ef93d380541 (patch)
treecb458362f11aa2132606ca9992873e3659891d21 /drivers/gpu/drm/tilcdc
parente59f5af9fba2cfccd26ceed085b9c5e89c81f0ca (diff)
downloadlinux-stable-274c34dbe756d441e2c1925465569ef93d380541.tar.gz
linux-stable-274c34dbe756d441e2c1925465569ef93d380541.tar.bz2
linux-stable-274c34dbe756d441e2c1925465569ef93d380541.zip
drm/tilcdc: Load palette at the end of mode_set_nofb()
Load palette at the end of mode_set_nofb(). Moving the palette loading to mode_set_nofb() saves us from storing and restoring of framebuffer addresses in dma registers that were just recently written there. Signed-off-by: Jyri Sarha <jsarha@ti.com> Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Diffstat (limited to 'drivers/gpu/drm/tilcdc')
-rw-r--r--drivers/gpu/drm/tilcdc/tilcdc_crtc.c25
1 files changed, 5 insertions, 20 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index f736a8970e8b..4472540d6bc0 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -121,15 +121,12 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
*/
static void tilcdc_crtc_load_palette(struct drm_crtc *crtc)
{
- u32 dma_fb_base, dma_fb_ceiling, raster_ctl;
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct tilcdc_drm_private *priv = dev->dev_private;
int ret;
- dma_fb_base = tilcdc_read(dev, LCDC_DMA_FB_BASE_ADDR_0_REG);
- dma_fb_ceiling = tilcdc_read(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG);
- raster_ctl = tilcdc_read(dev, LCDC_RASTER_CTRL_REG);
+ reinit_completion(&tilcdc_crtc->palette_loaded);
/* Tell the LCDC where the palette is located. */
tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG,
@@ -164,11 +161,6 @@ static void tilcdc_crtc_load_palette(struct drm_crtc *crtc)
tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);
else
tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_V2_PL_INT_ENA);
-
- /* Restore the registers. */
- tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_fb_base);
- tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, dma_fb_ceiling);
- tilcdc_write(dev, LCDC_RASTER_CTRL_REG, raster_ctl);
}
static void tilcdc_crtc_enable_irqs(struct drm_device *dev)
@@ -239,9 +231,6 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc)
reset(crtc);
- if (!completion_done(&tilcdc_crtc->palette_loaded))
- tilcdc_crtc_load_palette(crtc);
-
tilcdc_crtc_enable_irqs(dev);
tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE);
@@ -285,12 +274,6 @@ static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown)
__func__);
}
- /*
- * LCDC will not retain the palette when reset. Make sure it gets
- * reloaded on tilcdc_crtc_enable().
- */
- reinit_completion(&tilcdc_crtc->palette_loaded);
-
drm_crtc_vblank_off(crtc);
tilcdc_crtc_disable_irqs(dev);
@@ -678,10 +661,12 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
drm_framebuffer_reference(fb);
- set_scanout(crtc, fb);
-
tilcdc_crtc_set_clk(crtc);
+ tilcdc_crtc_load_palette(crtc);
+
+ set_scanout(crtc, fb);
+
crtc->hwmode = crtc->state->adjusted_mode;
}