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authorOlivier Moysan <olivier.moysan@st.com>2019-06-19 15:03:51 +0200
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2019-06-22 10:32:43 +0100
commit18eaffab90eb3c2280986bb546e571adc85756d5 (patch)
treec1d73fae875273cecadc67e250516a6edb39f2c9 /drivers/iio
parentd716204fd5472631970aa927c773c3302ac70fbe (diff)
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iio: adc: stm32-dfsdm: add comment for 16 bits record
Add a comment on DMA configuration for 16 bits record. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio')
-rw-r--r--drivers/iio/adc/stm32-dfsdm-adc.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c
index d855a605eab6..ee1e0569d0e1 100644
--- a/drivers/iio/adc/stm32-dfsdm-adc.c
+++ b/drivers/iio/adc/stm32-dfsdm-adc.c
@@ -918,6 +918,11 @@ static void stm32_dfsdm_dma_buffer_done(void *data)
static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
{
struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
+ /*
+ * The DFSDM supports half-word transfers. However, for 16 bits record,
+ * 4 bytes buswidth is kept, to avoid losing samples LSBs when left
+ * shift is required.
+ */
struct dma_slave_config config = {
.src_addr = (dma_addr_t)adc->dfsdm->phys_base,
.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,