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authorLinus Torvalds <torvalds@linux-foundation.org>2020-12-16 16:27:35 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2020-12-16 16:27:35 -0800
commit9805529ec544ea7a82d891d5239a8ebd3dbb2a3e (patch)
treed6b662fbd24e0be9623dab6a34e9f269462ab36b /drivers/interconnect/qcom
parentb0a6cd29e00a317d7fd823e0db57abbbd9bbb610 (diff)
parent13719d8d0d67998435c5748998ef686a10eefb4a (diff)
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Merge tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM device tree updates from Arnd Bergmann: "Across all platforms, there is a continued move towards DT schema for validating the dts files. As a result there are bug fixes for mistakes that are found using these schema, in addition to warnings from the dtc compiler. As usual, many changes are for adding support for additional on-chip and on-board components in the machines we already support. The newly supported SoCs for this release are: - MStar Infinity2M, a low-end IP camera chip based on a dual-core Cortex-A7, otherwise similar to the Infinity chip we already support. This is also known as the SigmaStar SSD202D, and we add support for the Honestar ssd201htv2 development kit. - Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller (BMC), in the same family as the NPCM750. This gets used in the Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of which are added as well. - Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own Brahma-B53 CPU. Support is also added for the Asus ROG Rapture GT-AC5300 high-end WiFi router based on this chip. - Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores, meant for faster Chromebooks and tablets. It gets added along with its reference design. - Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's generation, also added along with its reference board. This one is still based on Cortex-A75/A55. - Mediatek MT8167 is a version of the already supported MT8516 chip, both based on Cortex-A35. It gets added along with the "Pumpkin" single board computer, but is likely to also make its way into low-end tablets in the future. For the already supported chips, there are a number of new boards. Interestingly there are more 32-bit machines added this time than 64-bit. Here is a brief list of the new boards: - Three new Mikrotik router variants based on Marvell Prestera 98DX3236, a close relative of the more common Armada XP - A reference board for the Marvell Armada 382 - Three new servers using ASpeed baseboard management controllers, the actual machines being from Bytedance, Facebook and IBM, and one machine using the Nuvoton NPCM750 BMC. - The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412. - The usual set of 32-bit i.MX industrial/embedded hardware: * Protonic WD3 (tractor e-cockpit) * Kamstrup OMNIA Flex Concentrator (smart grid platform) * Van der Laan LANMCU (food storage) * Altesco I6P (vehicle inspection stations) * PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard - DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the aleady supported DHCOM module - Three new Allwinner SoC based single-board computers: * NanoPi R1 (H3 based) * FriendlyArm ZeroPi (H3 based) * Elimo Initium SBC (S3 based) - Ouya Game Console based on Nvidia Tegra 3 - Version 5 of the already supported Zynq Z-Turn MYIR Board - LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which is a repackaged 16-core LX2160A - A series of Kontron i.MX8M Mini baseboard/SoM versions - Espressobin Ultra, a new variant of the popular Armada 3700 based board, - IEI Puzzle-M801, a rackmount network appliance based on Marvell Armada 8040 - Microsoft Lumia 950 XL, a phone - HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and sm8150, respectively - Three new board variants of the "Trogdor" Chromebook (sc7180) - New board variants of the Renesas based "Kingfisher" and "HiHope" reference boards - Kobol Helios64, an open source NAS appliance based on Rockchips RK3399 - Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few carrier boards" * tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits) arm64: dts: sparx5: Add SGPIO devices arm64: dts: sparx5: Add reset support dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver ARM: mstar: SMP support ARM: mstar: Wire up smpctrl for SSD201/SSD202D ARM: mstar: Add smp ctrl registers to infinity2m dtsi ARM: mstar: Add dts for Honestar ssd201htv2 ARM: mstar: Add chip level dtsi for SSD202D ARM: mstar: Add common dtsi for SSD201/SSD202D ARM: mstar: Add infinity2m support dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards dt-bindings: vendor-prefixes: Add honestar vendor prefix dt-bindings: mstar: Add binding details for mstar,smpctrl ARM: mstar: Fill in GPIO controller properties for infinity ARM: mstar: Add gpio controller to MStar base dtsi ARM: zynq: Fix incorrect reference to XM013 instead of XM011 ARM: zynq: Convert at25 binding to new description on zc770-xm013 ARM: zynq: Fix OCM mapping to be aligned with binding on zc702 ARM: zynq: Fix leds subnode name for zc702/zybo-z7 ARM: zynq: Rename bus to be align with simple-bus yaml ...
Diffstat (limited to 'drivers/interconnect/qcom')
-rw-r--r--drivers/interconnect/qcom/sdm845.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c
index 5304aea3b058..366870150cbd 100644
--- a/drivers/interconnect/qcom/sdm845.c
+++ b/drivers/interconnect/qcom/sdm845.c
@@ -177,6 +177,7 @@ DEFINE_QBCM(bcm_sn15, "SN15", false, &qnm_memnoc);
static struct qcom_icc_bcm *aggre1_noc_bcms[] = {
&bcm_sn9,
+ &bcm_qup0,
};
static struct qcom_icc_node *aggre1_noc_nodes[] = {
@@ -190,6 +191,7 @@ static struct qcom_icc_node *aggre1_noc_nodes[] = {
[SLAVE_A1NOC_SNOC] = &qns_a1noc_snoc,
[SLAVE_SERVICE_A1NOC] = &srvc_aggre1_noc,
[SLAVE_ANOC_PCIE_A1NOC_SNOC] = &qns_pcie_a1noc_snoc,
+ [MASTER_QUP_1] = &qhm_qup1,
};
static const struct qcom_icc_desc sdm845_aggre1_noc = {
@@ -218,6 +220,7 @@ static struct qcom_icc_node *aggre2_noc_nodes[] = {
[SLAVE_A2NOC_SNOC] = &qns_a2noc_snoc,
[SLAVE_ANOC_PCIE_SNOC] = &qns_pcie_snoc,
[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
+ [MASTER_QUP_2] = &qhm_qup2,
};
static const struct qcom_icc_desc sdm845_aggre2_noc = {