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| author | Sakari Ailus <sakari.ailus@linux.intel.com> | 2020-06-18 12:39:44 +0200 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-12-07 15:53:34 +0100 |
| commit | ae502e08f45e47460406ab5c5fd2167a1011499a (patch) | |
| tree | 8b743d89ffc86319778debce13e8b8db9765eea9 /drivers/media/i2c/ccs-pll.h | |
| parent | 585e17c98407e1c2ec7735f37379e96cf0f74e3a (diff) | |
| download | linux-stable-ae502e08f45e47460406ab5c5fd2167a1011499a.tar.gz linux-stable-ae502e08f45e47460406ab5c5fd2167a1011499a.tar.bz2 linux-stable-ae502e08f45e47460406ab5c5fd2167a1011499a.zip | |
media: ccs-pll: Add support for decoupled OP domain calculation
Add support for decoupled OP domain clock calculation. This means that the
number of VT and OP domain clocks are no longer dependent on the number of
CSI-2 lanes in the lane speed mode.
The support also replaces the existing quirk flag to calculate OP domain
clocks per lane.
Also support decoupled OP domain calculation in the CCS driver.
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/i2c/ccs-pll.h')
| -rw-r--r-- | drivers/media/i2c/ccs-pll.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/media/i2c/ccs-pll.h b/drivers/media/i2c/ccs-pll.h index fe8eb3d4bcff..fe20af11a068 100644 --- a/drivers/media/i2c/ccs-pll.h +++ b/drivers/media/i2c/ccs-pll.h @@ -24,6 +24,7 @@ #define CCS_PLL_FLAG_NO_OP_CLOCKS BIT(1) /* CCS PLL flags */ #define CCS_PLL_FLAG_LANE_SPEED_MODEL BIT(2) +#define CCS_PLL_FLAG_LINK_DECOUPLED BIT(3) /** * struct ccs_pll_branch_fr - CCS PLL configuration (front) |