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author | Arnd Bergmann <arnd@arndb.de> | 2015-05-13 17:59:35 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2015-05-13 17:59:35 +0200 |
commit | 44fb3026ad28d2a2b935dc9c47ec2dffadca3f35 (patch) | |
tree | 9235a53f17b59c883bee7be16ab35cf816ce6ece /drivers/memory/tegra/tegra124.c | |
parent | 92d19e26d67704397b70cf5728fd77bd13b74c43 (diff) | |
parent | 9c77a81f215bfeee8f96c50c8ab27dbebffec80d (diff) | |
download | linux-stable-44fb3026ad28d2a2b935dc9c47ec2dffadca3f35.tar.gz linux-stable-44fb3026ad28d2a2b935dc9c47ec2dffadca3f35.tar.bz2 linux-stable-44fb3026ad28d2a2b935dc9c47ec2dffadca3f35.zip |
Merge tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "ARM: tegra: Add EMC driver for v4.2-rc1" from Thierry Reding:
This introduces the EMC driver that's required to scale the external
memory frequency.
* tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: tegra: Add EMC frequency debugfs entry
memory: tegra: Add EMC (external memory controller) driver
memory: tegra: Add API needed by the EMC driver
of: Add Tegra124 EMC bindings
of: Document timings subnode of nvidia,tegra-mc
Diffstat (limited to 'drivers/memory/tegra/tegra124.c')
-rw-r--r-- | drivers/memory/tegra/tegra124.c | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c index b996dfb9358b..966e1557e6f4 100644 --- a/drivers/memory/tegra/tegra124.c +++ b/drivers/memory/tegra/tegra124.c @@ -15,6 +15,48 @@ #include "mc.h" +#define MC_EMEM_ARB_CFG 0x90 +#define MC_EMEM_ARB_OUTSTANDING_REQ 0x94 +#define MC_EMEM_ARB_TIMING_RCD 0x98 +#define MC_EMEM_ARB_TIMING_RP 0x9c +#define MC_EMEM_ARB_TIMING_RC 0xa0 +#define MC_EMEM_ARB_TIMING_RAS 0xa4 +#define MC_EMEM_ARB_TIMING_FAW 0xa8 +#define MC_EMEM_ARB_TIMING_RRD 0xac +#define MC_EMEM_ARB_TIMING_RAP2PRE 0xb0 +#define MC_EMEM_ARB_TIMING_WAP2PRE 0xb4 +#define MC_EMEM_ARB_TIMING_R2R 0xb8 +#define MC_EMEM_ARB_TIMING_W2W 0xbc +#define MC_EMEM_ARB_TIMING_R2W 0xc0 +#define MC_EMEM_ARB_TIMING_W2R 0xc4 +#define MC_EMEM_ARB_DA_TURNS 0xd0 +#define MC_EMEM_ARB_DA_COVERS 0xd4 +#define MC_EMEM_ARB_MISC0 0xd8 +#define MC_EMEM_ARB_MISC1 0xdc +#define MC_EMEM_ARB_RING1_THROTTLE 0xe0 + +static const unsigned long tegra124_mc_emem_regs[] = { + MC_EMEM_ARB_CFG, + MC_EMEM_ARB_OUTSTANDING_REQ, + MC_EMEM_ARB_TIMING_RCD, + MC_EMEM_ARB_TIMING_RP, + MC_EMEM_ARB_TIMING_RC, + MC_EMEM_ARB_TIMING_RAS, + MC_EMEM_ARB_TIMING_FAW, + MC_EMEM_ARB_TIMING_RRD, + MC_EMEM_ARB_TIMING_RAP2PRE, + MC_EMEM_ARB_TIMING_WAP2PRE, + MC_EMEM_ARB_TIMING_R2R, + MC_EMEM_ARB_TIMING_W2W, + MC_EMEM_ARB_TIMING_R2W, + MC_EMEM_ARB_TIMING_W2R, + MC_EMEM_ARB_DA_TURNS, + MC_EMEM_ARB_DA_COVERS, + MC_EMEM_ARB_MISC0, + MC_EMEM_ARB_MISC1, + MC_EMEM_ARB_RING1_THROTTLE +}; + static const struct tegra_mc_client tegra124_mc_clients[] = { { .id = 0x00, @@ -991,6 +1033,8 @@ const struct tegra_mc_soc tegra124_mc_soc = { .num_address_bits = 34, .atom_size = 32, .smmu = &tegra124_smmu_soc, + .emem_regs = tegra124_mc_emem_regs, + .num_emem_regs = ARRAY_SIZE(tegra124_mc_emem_regs), }; #endif /* CONFIG_ARCH_TEGRA_124_SOC */ |