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| author | Atul Garg <agarg@arasan.com> | 2018-01-03 20:17:36 -0800 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-01-04 12:46:11 +0100 |
| commit | d72d72cd33ad59134de203b2fc4e2e4cc81e72c5 (patch) | |
| tree | 1dacae886fcca62d6b1ecff6d1a49f09cee7ff69 /drivers/mmc/host/sdhci-pci.h | |
| parent | 907a2317051628d2797f59440581cee60b12d6d1 (diff) | |
| download | linux-stable-d72d72cd33ad59134de203b2fc4e2e4cc81e72c5.tar.gz linux-stable-d72d72cd33ad59134de203b2fc4e2e4cc81e72c5.tar.bz2 linux-stable-d72d72cd33ad59134de203b2fc4e2e4cc81e72c5.zip | |
mmc:host:sdhci-pci:Addition of Arasan PCI Controller with integrated phy.
The Arasan Controller is based on a FPGA platform and has integrated phy
with specific registers used during initialization and
management of different modes. The phy and the controller are integrated
and registers are very specific to Arasan.
Arasan being an IP provider, licenses these IPs to various companies for
integration of IP in custom SOCs. The custom SOCs define own register
map depending on how bits are tied inside the SOC for phy registers,
depending on SOC memory plan and hence will require own platform drivers.
If more details on phy registers are required, an interface document is
hosted at https://arasan.com/NF/eMMC5.1 PHY Programming in Linux.pdf.
Signed-off-by: Atul Garg <agarg@arasan.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-pci.h')
| -rw-r--r-- | drivers/mmc/host/sdhci-pci.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h index 0056f08a29cc..5cbcdc448f98 100644 --- a/drivers/mmc/host/sdhci-pci.h +++ b/drivers/mmc/host/sdhci-pci.h @@ -55,6 +55,9 @@ #define PCI_SUBDEVICE_ID_NI_7884 0x7884 +#define PCI_VENDOR_ID_ARASAN 0x16e6 +#define PCI_DEVICE_ID_ARASAN_PHY_EMMC 0x0670 + /* * PCI device class and mask */ @@ -170,11 +173,13 @@ static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot) #ifdef CONFIG_PM_SLEEP int sdhci_pci_resume_host(struct sdhci_pci_chip *chip); #endif - +int sdhci_pci_enable_dma(struct sdhci_host *host); int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot); int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip); #ifdef CONFIG_PM_SLEEP int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip); #endif +extern const struct sdhci_pci_fixes sdhci_arasan; + #endif /* __SDHCI_PCI_H */ |