summaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/mellanox/mlxsw/trap.h
diff options
context:
space:
mode:
authorJiri Pirko <jiri@mellanox.com>2016-07-02 11:00:20 +0200
committerDavid S. Miller <davem@davemloft.net>2016-07-02 15:21:18 -0400
commit7b27ce7bb9cd6cff0e56d0a677d891b84ea4c665 (patch)
treebae0b696a34a60c400e12e6e698036fdccb9ee76 /drivers/net/ethernet/mellanox/mlxsw/trap.h
parent10f00aa1c410e46febcf09d92211fcb7da9ba5e9 (diff)
downloadlinux-stable-7b27ce7bb9cd6cff0e56d0a677d891b84ea4c665.tar.gz
linux-stable-7b27ce7bb9cd6cff0e56d0a677d891b84ea4c665.tar.bz2
linux-stable-7b27ce7bb9cd6cff0e56d0a677d891b84ea4c665.zip
mlxsw: spectrum: Add traps needed for router implementation
ip2me: To instruct HW to send trapped ip2me traffic to kernel, we have to add this trap. Selection ip2me traffic is introduced later on in this set. ARPs: We are going to stop flooding to CPU port when netdev isn't bridged and only get packets destined to the netdev's IP address and certain control packets. Add traps for ARP request (broadcast) and response (unicast) in order to get these to the CPU and resolve neighbours. host miss: If a packet is routed through a directly connected route and its destination IP is not in the device's neighbour table, then we need to trap it to CPU. This will cause the host to resolve the MAC of the neighbour, which will be eventually programmed to the device's table. router ingress: In order to trap packets in router part. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/trap.h')
-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/trap.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/trap.h b/drivers/net/ethernet/mellanox/mlxsw/trap.h
index 53a9550be75e..470d7696e9fe 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/trap.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/trap.h
@@ -54,6 +54,11 @@ enum {
MLXSW_TRAP_ID_IGMP_V2_REPORT = 0x32,
MLXSW_TRAP_ID_IGMP_V2_LEAVE = 0x33,
MLXSW_TRAP_ID_IGMP_V3_REPORT = 0x34,
+ MLXSW_TRAP_ID_ARPBC = 0x50,
+ MLXSW_TRAP_ID_ARPUC = 0x51,
+ MLXSW_TRAP_ID_IP2ME = 0x5F,
+ MLXSW_TRAP_ID_RTR_INGRESS0 = 0x70,
+ MLXSW_TRAP_ID_HOST_MISS_IPV4 = 0x90,
MLXSW_TRAP_ID_MAX = 0x1FF
};