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| author | Stephen Hemminger <shemminger@osdl.org> | 2005-08-16 14:00:54 -0700 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-08-16 17:03:13 -0400 |
| commit | 050ec18a35f3106437da8e9c55e441c076c7b93e (patch) | |
| tree | e0de01c46c50d466e515a8459807bb491c4af767 /drivers/net/skge.h | |
| parent | ab707da7cf0a1a1d27c6021356cfb3692cf1bd26 (diff) | |
| download | linux-stable-050ec18a35f3106437da8e9c55e441c076c7b93e.tar.gz linux-stable-050ec18a35f3106437da8e9c55e441c076c7b93e.tar.bz2 linux-stable-050ec18a35f3106437da8e9c55e441c076c7b93e.zip | |
[PATCH] skge: stop bogus sensor messages
Some versions of the Marvell yukon generate bogus sensor warning interrupts.
The driver would flood log with these messages. Handle this situation
cleanly by masking away at boot time.
Fixes: http://bugs.gentoo.org/show_bug.cgi?id=87182
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
drivers/net/skge.c | 24 ++++++++++--------------
drivers/net/skge.h | 8 ++++++--
2 files changed, 16 insertions(+), 16 deletions(-)
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net/skge.h')
| -rw-r--r-- | drivers/net/skge.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/skge.h b/drivers/net/skge.h index b432f1bb8168..636729fcbbaa 100644 --- a/drivers/net/skge.h +++ b/drivers/net/skge.h @@ -214,8 +214,6 @@ enum { /* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */ enum { - IS_ERR_MSK = 0x00003fff,/* All Error bits */ - IS_IRQ_TIST_OV = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */ IS_IRQ_SENSOR = 1<<12, /* IRQ from Sensor (YUKON only) */ IS_IRQ_MST_ERR = 1<<11, /* IRQ master error detected */ @@ -230,6 +228,12 @@ enum { IS_M2_PAR_ERR = 1<<2, /* MAC 2 Parity Error */ IS_R1_PAR_ERR = 1<<1, /* Queue R1 Parity Error */ IS_R2_PAR_ERR = 1<<0, /* Queue R2 Parity Error */ + + IS_ERR_MSK = IS_IRQ_MST_ERR | IS_IRQ_STAT + | IS_NO_STAT_M1 | IS_NO_STAT_M2 + | IS_RAM_RD_PAR | IS_RAM_WR_PAR + | IS_M1_PAR_ERR | IS_M2_PAR_ERR + | IS_R1_PAR_ERR | IS_R2_PAR_ERR, }; /* B2_TST_CTRL1 8 bit Test Control Register 1 */ |