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| author | Bjorn Helgaas <bhelgaas@google.com> | 2017-11-13 15:05:50 -0600 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-11-30 08:40:41 +0000 |
| commit | d42e6a246cd75143e9133f740ac979011f81bc43 (patch) | |
| tree | d1a9b7df01139c6224bd9963d9ee5525c650f632 /drivers/pci | |
| parent | 576bdf9642d97c8aafb0305960c00259d7438b06 (diff) | |
| download | linux-stable-d42e6a246cd75143e9133f740ac979011f81bc43.tar.gz linux-stable-d42e6a246cd75143e9133f740ac979011f81bc43.tar.bz2 linux-stable-d42e6a246cd75143e9133f740ac979011f81bc43.zip | |
PCI/ASPM: Use correct capability pointer to program LTR_L1.2_THRESHOLD
commit c00054f540bf81e592e1fee709b0bdbf20f478b5 upstream.
Previously we programmed the LTR_L1.2_THRESHOLD in the parent (upstream)
device using the capability pointer of the *child* (downstream) device,
which corrupted some random word of the parent's config space.
Use the parent's L1 SS capability pointer to program its
LTR_L1.2_THRESHOLD.
Fixes: aeda9adebab8 ("PCI/ASPM: Configure L1 substate settings")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
CC: Rajat Jain <rajatja@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pcie/aspm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 1196c5202558..cae54f8320be 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -658,7 +658,7 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state) 0xFF00, link->l1ss.ctl1); /* Program LTR L1.2 threshold in both ports */ - pci_clear_and_set_dword(parent, dw_cap_ptr + PCI_L1SS_CTL1, + pci_clear_and_set_dword(parent, up_cap_ptr + PCI_L1SS_CTL1, 0xE3FF0000, link->l1ss.ctl1); pci_clear_and_set_dword(child, dw_cap_ptr + PCI_L1SS_CTL1, 0xE3FF0000, link->l1ss.ctl1); |