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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-01-26 01:22:39 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2024-01-30 22:35:38 +0530 |
| commit | c01e03f97c4ea501fbd7dfe3eb7920a9a855e635 (patch) | |
| tree | fb64e243179cbb522561bc6488fef5155e3d9ba0 /drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c | |
| parent | ef643d55fdeb30299367e0e15ef47945f60d5a11 (diff) | |
| download | linux-stable-c01e03f97c4ea501fbd7dfe3eb7920a9a855e635.tar.gz linux-stable-c01e03f97c4ea501fbd7dfe3eb7920a9a855e635.tar.bz2 linux-stable-c01e03f97c4ea501fbd7dfe3eb7920a9a855e635.zip | |
phy: qcom: qmp: move common bits definitions to common header
Move bit definitions for the common headers to the common phy-qcom-qmp.h
header.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-5-a463d0b57836@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c')
| -rw-r--r-- | drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c index ca220878c630..6d0ba39c1943 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c @@ -27,16 +27,6 @@ #include "phy-qcom-qmp-dp-com-v3.h" -/* QPHY_SW_RESET bit */ -#define SW_RESET BIT(0) -/* QPHY_POWER_DOWN_CONTROL */ -#define SW_PWRDN BIT(0) -/* QPHY_START_CONTROL bits */ -#define SERDES_START BIT(0) -#define PCS_START BIT(1) -/* QPHY_PCS_STATUS bit */ -#define PHYSTATUS BIT(6) - /* QPHY_V3_DP_COM_RESET_OVRD_CTRL register bits */ /* DP PHY soft reset */ #define SW_DPPHY_RESET BIT(0) @@ -51,17 +41,6 @@ #define USB3_MODE BIT(0) /* enables USB3 mode */ #define DP_MODE BIT(1) /* enables DP mode */ -/* QPHY_PCS_AUTONOMOUS_MODE_CTRL register bits */ -#define ARCVR_DTCT_EN BIT(0) -#define ALFPS_DTCT_EN BIT(1) -#define ARCVR_DTCT_EVENT_SEL BIT(4) - -/* QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR register bits */ -#define IRQ_CLEAR BIT(0) - -/* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */ -#define CLAMP_EN BIT(0) /* enables i/o clamp_n */ - #define PHY_INIT_COMPLETE_TIMEOUT 10000 struct qmp_phy_init_tbl { |