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author | Rafał Miłecki <rafal@milecki.pl> | 2017-06-08 22:04:26 +0200 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2017-06-16 13:22:26 +0530 |
commit | 4536adee0a96864a1ff000025c4c9a6299541f83 (patch) | |
tree | 1936c704e34806fe6ab7cd3819d1a89a356ce866 /drivers/phy | |
parent | b20f506f6c63a3e6ee77aa4d519e4880c8a9d2f4 (diff) | |
download | linux-stable-4536adee0a96864a1ff000025c4c9a6299541f83.tar.gz linux-stable-4536adee0a96864a1ff000025c4c9a6299541f83.tar.bz2 linux-stable-4536adee0a96864a1ff000025c4c9a6299541f83.zip |
phy: bcm-ns-usb3: enable MDIO in the platform specific code
When we finally start using MDIO layer then bus initialization will be
handled in a separated driver. It means our code handling this has to be
used for the platform driver only.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r-- | drivers/phy/broadcom/phy-bcm-ns-usb3.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/phy/broadcom/phy-bcm-ns-usb3.c b/drivers/phy/broadcom/phy-bcm-ns-usb3.c index 3d0fe5728029..2c9a0d5f43d8 100644 --- a/drivers/phy/broadcom/phy-bcm-ns-usb3.c +++ b/drivers/phy/broadcom/phy-bcm-ns-usb3.c @@ -80,12 +80,6 @@ static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3) { int err; - /* Enable MDIO. Setting MDCDIV as 26 */ - writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); - - /* Wait for MDIO? */ - udelay(2); - /* USB3 PLL Block */ err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, BCM_NS_USB3_PHY_PLL30_BLOCK); @@ -134,12 +128,6 @@ static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3) { int err; - /* Enable MDIO. Setting MDCDIV as 26 */ - writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); - - /* Wait for MDIO? */ - udelay(2); - /* PLL30 block */ err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, BCM_NS_USB3_PHY_PLL30_BLOCK); @@ -278,6 +266,12 @@ static int bcm_ns_usb3_probe(struct platform_device *pdev) return PTR_ERR(usb3->ccb_mii); } + /* Enable MDIO. Setting MDCDIV as 26 */ + writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); + + /* Wait for MDIO? */ + udelay(2); + usb3->phy_write = bcm_ns_usb3_platform_phy_write; usb3->phy = devm_phy_create(dev, NULL, &ops); |