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| author | Andrew Jeffery <andrew@aj.id.au> | 2016-12-20 18:05:50 +1030 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-12-28 01:21:23 +0100 |
| commit | f1337856dd88858bf58bd062306ccbfb63303085 (patch) | |
| tree | 9dc436fd27bbc6e73caf8372327561c225eb5d88 /drivers/pinctrl/aspeed/pinctrl-aspeed.h | |
| parent | 6d329f14a75f3858a1254abca8b94d4fab556a9a (diff) | |
| download | linux-stable-f1337856dd88858bf58bd062306ccbfb63303085.tar.gz linux-stable-f1337856dd88858bf58bd062306ccbfb63303085.tar.bz2 linux-stable-f1337856dd88858bf58bd062306ccbfb63303085.zip | |
pinctrl: aspeed-g5: Add mux configuration for all pins
The patch introducing the g5 pinctrl driver implemented a smattering of
pins to flesh out the implementation of the core and provide bare-bones
support for some OpenPOWER platforms and the AST2500 evaluation board.
Now, update the bindings document to reflect the complete functionality
and implement the necessary pin configuration tables in the driver.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/aspeed/pinctrl-aspeed.h')
| -rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h index 0e93cbf2ff33..08a10d4db229 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h @@ -260,6 +260,7 @@ #define SCUA0 0xA0 /* Multi-function Pin Control #7 */ #define SCUA4 0xA4 /* Multi-function Pin Control #8 */ #define SCUA8 0xA8 /* Multi-function Pin Control #9 */ +#define SCUAC 0xAC /* Multi-function Pin Control #10 */ #define HW_STRAP2 0xD0 /* Strapping */ /** |