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| author | Olof Johansson <olof@lixom.net> | 2012-09-20 19:57:38 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-09-20 19:57:38 -0700 |
| commit | 32dec75349da4e68b53f099ce3a96469cdc334d6 (patch) | |
| tree | 96aca7914b07697668ec716a3f80fb8c82e7a971 /drivers/pwm/pwm-tiecap.c | |
| parent | 740418ef19fd7def7b9c333435d4ca1dce28cc42 (diff) | |
| parent | 9891e3240543c45176b1298164418b61e8909ed0 (diff) | |
| download | linux-stable-32dec75349da4e68b53f099ce3a96469cdc334d6.tar.gz linux-stable-32dec75349da4e68b53f099ce3a96469cdc334d6.tar.bz2 linux-stable-32dec75349da4e68b53f099ce3a96469cdc334d6.zip | |
Merge tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
ARM: tegra: switch to dmaengine
The Tegra code-base has contained both a legacy DMA and a dmaengine
driver since v3.6-rcX. This series flips Tegra's defconfig to enable
dmaengine rather than the legacy driver, and removes the legacy driver
and all client code.
* tag 'tegra-for-3.7-dmaengine' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ASoC: tegra: remove support of legacy DMA driver based access
spi: tegra: remove support of legacy DMA driver based access
ARM: tegra: apbio: remove support of legacy DMA driver based access
ARM: tegra: dma: remove legacy APB DMA driver
ARM: tegra: config: enable dmaengine based APB DMA driver
+ sync to 3.6-rc6
Diffstat (limited to 'drivers/pwm/pwm-tiecap.c')
| -rw-r--r-- | drivers/pwm/pwm-tiecap.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-tiecap.c b/drivers/pwm/pwm-tiecap.c index 0b66d0f25922..4b6688909fee 100644 --- a/drivers/pwm/pwm-tiecap.c +++ b/drivers/pwm/pwm-tiecap.c @@ -100,6 +100,13 @@ static int ecap_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, writel(period_cycles, pc->mmio_base + CAP3); } + if (!test_bit(PWMF_ENABLED, &pwm->flags)) { + reg_val = readw(pc->mmio_base + ECCTL2); + /* Disable APWM mode to put APWM output Low */ + reg_val &= ~ECCTL2_APWM_MODE; + writew(reg_val, pc->mmio_base + ECCTL2); + } + pm_runtime_put_sync(pc->chip.dev); return 0; } |