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| author | Nikolaus Voss <n.voss@weinmann-emt.de> | 2014-09-23 15:30:21 +0200 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2014-09-25 08:52:39 +0200 |
| commit | e2e08970100db03bb84fd4a72f9c35bfc18d595a (patch) | |
| tree | 826f2e39834f3b497da11547a50b37f7fdc6746a /drivers/pwm | |
| parent | 70145f87139fbc43b726f873813cd91dce371899 (diff) | |
| download | linux-stable-e2e08970100db03bb84fd4a72f9c35bfc18d595a.tar.gz linux-stable-e2e08970100db03bb84fd4a72f9c35bfc18d595a.tar.bz2 linux-stable-e2e08970100db03bb84fd4a72f9c35bfc18d595a.zip | |
pwm: atmel: Fix calculation of prescale value
The prescale value used for calculating the period was incremented
afterwards, thus the resulting prescale value is by one too high.
This resulted in a PWM frequency only half as high as requested.
This patch moves the 64 bit division out of the prescale loop to
correct the above issue and make the calculation more efficient.
Signed-off-by: Nikolaus Voss <n.voss@weinmann-emt.de>
Tested-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
| -rw-r--r-- | drivers/pwm/pwm-atmel.c | 24 |
1 files changed, 11 insertions, 13 deletions
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 6e700a541ca3..d3c22de9ee47 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -102,7 +102,7 @@ static int atmel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); - unsigned long clk_rate, prd, dty; + unsigned long prd, dty; unsigned long long div; unsigned int pres = 0; u32 val; @@ -113,20 +113,18 @@ static int atmel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, return -EBUSY; } - clk_rate = clk_get_rate(atmel_pwm->clk); - div = clk_rate; + /* Calculate the period cycles and prescale value */ + div = (unsigned long long)clk_get_rate(atmel_pwm->clk) * period_ns; + do_div(div, NSEC_PER_SEC); - /* Calculate the period cycles */ while (div > PWM_MAX_PRD) { - div = clk_rate / (1 << pres); - div = div * period_ns; - /* 1/Hz = 100000000 ns */ - do_div(div, 1000000000); - - if (pres++ > PRD_MAX_PRES) { - dev_err(chip->dev, "pres exceeds the maximum value\n"); - return -EINVAL; - } + div >>= 1; + pres++; + } + + if (pres > PRD_MAX_PRES) { + dev_err(chip->dev, "pres exceeds the maximum value\n"); + return -EINVAL; } /* Calculate the duty cycles */ |