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author | Eric Jeong <eric.jeong.opensource@diasemi.com> | 2016-09-26 16:33:27 +0900 |
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committer | Mark Brown <broonie@kernel.org> | 2016-09-26 08:59:08 -0700 |
commit | 5ff00f6aa84b7f4203f525fc6c4a4291e32c314d (patch) | |
tree | 95c7aeac31b0127426b5730592396ea53e723ddd /drivers/regulator/pv88080-regulator.h | |
parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc (diff) | |
download | linux-stable-5ff00f6aa84b7f4203f525fc6c4a4291e32c314d.tar.gz linux-stable-5ff00f6aa84b7f4203f525fc6c4a4291e32c314d.tar.bz2 linux-stable-5ff00f6aa84b7f4203f525fc6c4a4291e32c314d.zip |
regulator: pv88080: Update regulator for PV88080 BB silicon support
Three files are modified, the driver, header file and the binding document.
Updates for the regulator source file include and .of_match_table entry
and node match checking in the probe() function for a compatible pv88080
silicon type. A new "HVBUCK" is added in source file and added
regsiter definition in header file for pv88080 bb silicion.
The binding documentation changes have been made to reflect these updates.
Signed-off-by: Eric Jeong <eric.jeong.opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/regulator/pv88080-regulator.h')
-rw-r--r-- | drivers/regulator/pv88080-regulator.h | 114 |
1 files changed, 70 insertions, 44 deletions
diff --git a/drivers/regulator/pv88080-regulator.h b/drivers/regulator/pv88080-regulator.h index 5e9afde606f4..ae25ff360e3d 100644 --- a/drivers/regulator/pv88080-regulator.h +++ b/drivers/regulator/pv88080-regulator.h @@ -17,55 +17,75 @@ #define __PV88080_REGISTERS_H__ /* System Control and Event Registers */ -#define PV88080_REG_EVENT_A 0x04 -#define PV88080_REG_MASK_A 0x09 -#define PV88080_REG_MASK_B 0x0a -#define PV88080_REG_MASK_C 0x0b - -/* Regulator Registers */ -#define PV88080_REG_BUCK1_CONF0 0x27 -#define PV88080_REG_BUCK1_CONF1 0x28 -#define PV88080_REG_BUCK1_CONF2 0x59 -#define PV88080_REG_BUCK1_CONF5 0x5c -#define PV88080_REG_BUCK2_CONF0 0x29 -#define PV88080_REG_BUCK2_CONF1 0x2a -#define PV88080_REG_BUCK2_CONF2 0x61 -#define PV88080_REG_BUCK2_CONF5 0x64 -#define PV88080_REG_BUCK3_CONF0 0x2b -#define PV88080_REG_BUCK3_CONF1 0x2c -#define PV88080_REG_BUCK3_CONF2 0x69 -#define PV88080_REG_BUCK3_CONF5 0x6c +#define PV88080_REG_EVENT_A 0x04 +#define PV88080_REG_MASK_A 0x09 +#define PV88080_REG_MASK_B 0x0A +#define PV88080_REG_MASK_C 0x0B + +/* Regulator Registers - rev. AA */ +#define PV88080AA_REG_HVBUCK_CONF1 0x2D +#define PV88080AA_REG_HVBUCK_CONF2 0x2E +#define PV88080AA_REG_BUCK1_CONF0 0x27 +#define PV88080AA_REG_BUCK1_CONF1 0x28 +#define PV88080AA_REG_BUCK1_CONF2 0x59 +#define PV88080AA_REG_BUCK1_CONF5 0x5C +#define PV88080AA_REG_BUCK2_CONF0 0x29 +#define PV88080AA_REG_BUCK2_CONF1 0x2A +#define PV88080AA_REG_BUCK2_CONF2 0x61 +#define PV88080AA_REG_BUCK2_CONF5 0x64 +#define PV88080AA_REG_BUCK3_CONF0 0x2B +#define PV88080AA_REG_BUCK3_CONF1 0x2C +#define PV88080AA_REG_BUCK3_CONF2 0x69 +#define PV88080AA_REG_BUCK3_CONF5 0x6C + +/* Regulator Registers - rev. BA */ +#define PV88080BA_REG_HVBUCK_CONF1 0x33 +#define PV88080BA_REG_HVBUCK_CONF2 0x34 +#define PV88080BA_REG_BUCK1_CONF0 0x2A +#define PV88080BA_REG_BUCK1_CONF1 0x2C +#define PV88080BA_REG_BUCK1_CONF2 0x5A +#define PV88080BA_REG_BUCK1_CONF5 0x5D +#define PV88080BA_REG_BUCK2_CONF0 0x2D +#define PV88080BA_REG_BUCK2_CONF1 0x2F +#define PV88080BA_REG_BUCK2_CONF2 0x63 +#define PV88080BA_REG_BUCK2_CONF5 0x66 +#define PV88080BA_REG_BUCK3_CONF0 0x30 +#define PV88080BA_REG_BUCK3_CONF1 0x32 +#define PV88080BA_REG_BUCK3_CONF2 0x6C +#define PV88080BA_REG_BUCK3_CONF5 0x6F /* PV88080_REG_EVENT_A (addr=0x04) */ #define PV88080_E_VDD_FLT 0x01 -#define PV88080_E_OVER_TEMP 0x02 +#define PV88080_E_OVER_TEMP 0x02 /* PV88080_REG_MASK_A (addr=0x09) */ #define PV88080_M_VDD_FLT 0x01 -#define PV88080_M_OVER_TEMP 0x02 +#define PV88080_M_OVER_TEMP 0x02 -/* PV88080_REG_BUCK1_CONF0 (addr=0x27) */ +/* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */ #define PV88080_BUCK1_EN 0x80 -#define PV88080_VBUCK1_MASK 0x7F -/* PV88080_REG_BUCK2_CONF0 (addr=0x29) */ +#define PV88080_VBUCK1_MASK 0x7F + +/* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */ #define PV88080_BUCK2_EN 0x80 -#define PV88080_VBUCK2_MASK 0x7F -/* PV88080_REG_BUCK3_CONF0 (addr=0x2b) */ +#define PV88080_VBUCK2_MASK 0x7F + +/* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */ #define PV88080_BUCK3_EN 0x80 -#define PV88080_VBUCK3_MASK 0x7F +#define PV88080_VBUCK3_MASK 0x7F -/* PV88080_REG_BUCK1_CONF1 (addr=0x28) */ -#define PV88080_BUCK1_ILIM_SHIFT 2 +/* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */ +#define PV88080_BUCK1_ILIM_SHIFT 2 #define PV88080_BUCK1_ILIM_MASK 0x0C #define PV88080_BUCK1_MODE_MASK 0x03 -/* PV88080_REG_BUCK2_CONF1 (addr=0x2a) */ -#define PV88080_BUCK2_ILIM_SHIFT 2 +/* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */ +#define PV88080_BUCK2_ILIM_SHIFT 2 #define PV88080_BUCK2_ILIM_MASK 0x0C #define PV88080_BUCK2_MODE_MASK 0x03 -/* PV88080_REG_BUCK3_CONF1 (addr=0x2c) */ -#define PV88080_BUCK3_ILIM_SHIFT 2 +/* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */ +#define PV88080_BUCK3_ILIM_SHIFT 2 #define PV88080_BUCK3_ILIM_MASK 0x0C #define PV88080_BUCK3_MODE_MASK 0x03 @@ -73,20 +93,26 @@ #define PV88080_BUCK_MODE_AUTO 0x01 #define PV88080_BUCK_MODE_SYNC 0x02 -/* PV88080_REG_BUCK2_CONF2 (addr=0x61) */ -/* PV88080_REG_BUCK3_CONF2 (addr=0x69) */ -#define PV88080_BUCK_VDAC_RANGE_SHIFT 7 -#define PV88080_BUCK_VDAC_RANGE_MASK 0x01 +/* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */ +#define PV88080_VHVBUCK_MASK 0xFF + +/* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */ +#define PV88080_HVBUCK_EN 0x01 + +/* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */ +/* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */ +#define PV88080_BUCK_VDAC_RANGE_SHIFT 7 +#define PV88080_BUCK_VDAC_RANGE_MASK 0x01 -#define PV88080_BUCK_VDAC_RANGE_1 0x00 -#define PV88080_BUCK_VDAC_RANGE_2 0x01 +#define PV88080_BUCK_VDAC_RANGE_1 0x00 +#define PV88080_BUCK_VDAC_RANGE_2 0x01 -/* PV88080_REG_BUCK2_CONF5 (addr=0x64) */ -/* PV88080_REG_BUCK3_CONF5 (addr=0x6c) */ -#define PV88080_BUCK_VRANGE_GAIN_SHIFT 0 -#define PV88080_BUCK_VRANGE_GAIN_MASK 0x01 +/* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */ +/* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */ +#define PV88080_BUCK_VRANGE_GAIN_SHIFT 0 +#define PV88080_BUCK_VRANGE_GAIN_MASK 0x01 -#define PV88080_BUCK_VRANGE_GAIN_1 0x00 -#define PV88080_BUCK_VRANGE_GAIN_2 0x01 +#define PV88080_BUCK_VRANGE_GAIN_1 0x00 +#define PV88080_BUCK_VRANGE_GAIN_2 0x01 #endif /* __PV88080_REGISTERS_H__ */ |