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authorSekhar Nori <nsekhar@ti.com>2010-07-20 16:46:49 +0530
committerKevin Hilman <khilman@deeprootsystems.com>2010-09-24 07:40:24 -0700
commitb39639b820ca64e55c39b5217773919ca7973cec (patch)
tree53b2eba184359e1aa748e40891b3fd4149228697 /drivers/regulator
parent0a477f6b8c1849701981f6e00e7afcd35af75546 (diff)
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davinci: clock: add support for setting sysclk rate
Setting sysclk rate will be useful in cases where the sysclk is not at a fixed ratio to the PLL output but can asynchronously be changed. This support forms the basis of attempt to keep the AEMIF clock constant on OMAP-L138 even as PLL0 output changes as ARM clock is changed to save power. This patch has been tested on OMAP-L138. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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