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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-11-29 11:56:17 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2018-11-30 11:22:30 +0100 |
| commit | 97473bc85b22ac610b1810b6a9a4669a6cb0b7b0 (patch) | |
| tree | b10f2cd37db024cd9c5a3a719a58a46a2d745e96 /drivers/soc | |
| parent | b5eb730e031acaba2d25e8f522ac5966a70885ae (diff) | |
| download | linux-stable-97473bc85b22ac610b1810b6a9a4669a6cb0b7b0.tar.gz linux-stable-97473bc85b22ac610b1810b6a9a4669a6cb0b7b0.tar.bz2 linux-stable-97473bc85b22ac610b1810b6a9a4669a6cb0b7b0.zip | |
soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp.
A2DP1.
As these definitions are not yet used from DT, they can just be renamed.
Fixes: 7755b40d07a8dba7 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8ae94ca9 ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/renesas/r8a77980-sysc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/renesas/r8a77980-sysc.c b/drivers/soc/renesas/r8a77980-sysc.c index 9265fb525ef3..dbb2621ce4e3 100644 --- a/drivers/soc/renesas/r8a77980-sysc.c +++ b/drivers/soc/renesas/r8a77980-sysc.c @@ -38,8 +38,8 @@ static const struct rcar_sysc_area r8a77980_areas[] __initconst = { { "a2sc2", 0x400, 8, R8A77980_PD_A2SC2, R8A77980_PD_A3IR }, { "a2sc3", 0x400, 9, R8A77980_PD_A2SC3, R8A77980_PD_A3IR }, { "a2sc4", 0x400, 10, R8A77980_PD_A2SC4, R8A77980_PD_A3IR }, - { "a2pd0", 0x400, 11, R8A77980_PD_A2PD0, R8A77980_PD_A3IR }, - { "a2pd1", 0x400, 12, R8A77980_PD_A2PD1, R8A77980_PD_A3IR }, + { "a2dp0", 0x400, 11, R8A77980_PD_A2DP0, R8A77980_PD_A3IR }, + { "a2dp1", 0x400, 12, R8A77980_PD_A2DP1, R8A77980_PD_A3IR }, { "a2cn", 0x400, 13, R8A77980_PD_A2CN, R8A77980_PD_A3IR }, { "a3vip", 0x2c0, 0, R8A77980_PD_A3VIP, R8A77980_PD_ALWAYS_ON }, { "a3vip1", 0x300, 0, R8A77980_PD_A3VIP1, R8A77980_PD_A3VIP }, |