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author | Michal Suchanek <hramrach@gmail.com> | 2016-06-13 17:46:49 +0000 |
---|---|---|
committer | Sasha Levin <sasha.levin@oracle.com> | 2016-07-11 11:16:34 -0400 |
commit | ab50dd9e91f04b40927c541f8b30e39a767665ab (patch) | |
tree | 6ad1595dc9f1aa413d3bff7065fa2447a8971228 /drivers/spi | |
parent | d259ae2b8a5635dd30148bf76d34c0b421791b5b (diff) | |
download | linux-stable-ab50dd9e91f04b40927c541f8b30e39a767665ab.tar.gz linux-stable-ab50dd9e91f04b40927c541f8b30e39a767665ab.tar.bz2 linux-stable-ab50dd9e91f04b40927c541f8b30e39a767665ab.zip |
spi: sun4i: fix FIFO limit
[ Upstream commit 6d9fe44bd73d567d04d3a68a2d2fa521ab9532f2 ]
When testing SPI without DMA I noticed that filling the FIFO on the
spi controller causes timeout.
Always leave room for one byte in the FIFO.
Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/spi-sun4i.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 85204c93f3d3..04b46e01dd3f 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -176,7 +176,10 @@ static int sun4i_spi_transfer_one(struct spi_master *master, /* We don't support transfer larger than the FIFO */ if (tfr->len > SUN4I_FIFO_DEPTH) - return -EINVAL; + return -EMSGSIZE; + + if (tfr->tx_buf && tfr->len >= SUN4I_FIFO_DEPTH) + return -EMSGSIZE; reinit_completion(&sspi->done); sspi->tx_buf = tfr->tx_buf; @@ -269,8 +272,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master, sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len)); sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); - /* Fill the TX FIFO */ - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH); + /* + * Fill the TX FIFO + * Filling the FIFO fully causes timeout for some reason + * at least on spi2 on A10s + */ + sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); /* Enable the interrupts */ sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC); |