diff options
author | Ioannis Valasakis <code@wizofe.uk> | 2018-10-04 13:41:01 +0100 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-10-09 14:57:33 +0200 |
commit | d5213236151ba6968b04f4da0e03f66c56a18587 (patch) | |
tree | 42833c3422be866f89f37ebcca2622339440857d /drivers/staging/clocking-wizard | |
parent | 34ff787136b2e83e79bc7d9481395439028de82d (diff) | |
download | linux-stable-d5213236151ba6968b04f4da0e03f66c56a18587.tar.gz linux-stable-d5213236151ba6968b04f4da0e03f66c56a18587.tar.bz2 linux-stable-d5213236151ba6968b04f4da0e03f66c56a18587.zip |
staging: clocking-wizard: match parenthesis indentation
Match parenthesis indentation after line end, and fixed alignment
to conform to the coding style guidelines.
Reported by checkpatch.
Signed-off-by: Ioannis Valasakis <code@wizofe.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/clocking-wizard')
-rw-r--r-- | drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c index cae7e6e695b0..15b7a82f4b1e 100644 --- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c +++ b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c @@ -199,10 +199,10 @@ static int clk_wzrd_probe(struct platform_device *pdev) ret = -ENOMEM; goto err_disable_clk; } - clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor( - &pdev->dev, clk_name, - __clk_get_name(clk_wzrd->clk_in1), - 0, reg, 1); + clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor + (&pdev->dev, clk_name, + __clk_get_name(clk_wzrd->clk_in1), + 0, reg, 1); kfree(clk_name); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) { dev_err(&pdev->dev, "unable to register fixed-factor clock\n"); @@ -219,10 +219,10 @@ static int clk_wzrd_probe(struct platform_device *pdev) goto err_rm_int_clk; } - clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor( - &pdev->dev, clk_name, - __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), - 0, 1, reg); + clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor + (&pdev->dev, clk_name, + __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), + 0, 1, reg); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) { dev_err(&pdev->dev, "unable to register divider clock\n"); ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); @@ -243,8 +243,8 @@ static int clk_wzrd_probe(struct platform_device *pdev) reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(2) + i * 12); reg &= WZRD_CLKOUT_DIVIDE_MASK; reg >>= WZRD_CLKOUT_DIVIDE_SHIFT; - clk_wzrd->clkout[i] = clk_register_fixed_factor(&pdev->dev, - clkout_name, clk_name, 0, 1, reg); + clk_wzrd->clkout[i] = clk_register_fixed_factor + (&pdev->dev, clkout_name, clk_name, 0, 1, reg); if (IS_ERR(clk_wzrd->clkout[i])) { int j; |