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| author | Harsh Jain <harsh@chelsio.com> | 2018-12-11 16:21:42 +0530 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2018-12-23 11:52:43 +0800 |
| commit | f31ba0f95f1998118098978dbfb25ecbec6b0891 (patch) | |
| tree | c7a6ce1c90f61afd13780fdcad3afca4d1be042e /drivers | |
| parent | 6501ab5ed4d925cce4c2a1c49b63583c42e65bd8 (diff) | |
| download | linux-stable-f31ba0f95f1998118098978dbfb25ecbec6b0891.tar.gz linux-stable-f31ba0f95f1998118098978dbfb25ecbec6b0891.tar.bz2 linux-stable-f31ba0f95f1998118098978dbfb25ecbec6b0891.zip | |
crypto: chelsio - Fix wrong error counter increments
Fix error counter increment in AEAD decrypt operation when
validation of tag is done in Driver instead of H/W.
Signed-off-by: Harsh Jain <harsh@chelsio.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/crypto/chelsio/chcr_algo.c | 9 | ||||
| -rw-r--r-- | drivers/crypto/chelsio/chcr_core.c | 11 |
2 files changed, 10 insertions, 10 deletions
diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c index df526414f03f..eedc33128da4 100644 --- a/drivers/crypto/chelsio/chcr_algo.c +++ b/drivers/crypto/chelsio/chcr_algo.c @@ -218,7 +218,7 @@ static inline void chcr_dec_wrcount(struct chcr_dev *dev) atomic_dec(&dev->inflight); } -static inline void chcr_handle_aead_resp(struct aead_request *req, +static inline int chcr_handle_aead_resp(struct aead_request *req, unsigned char *input, int err) { @@ -233,6 +233,8 @@ static inline void chcr_handle_aead_resp(struct aead_request *req, } chcr_dec_wrcount(dev); req->base.complete(&req->base, err); + + return err; } static void get_aes_decrypt_key(unsigned char *dec_key, @@ -2072,14 +2074,13 @@ int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input, switch (tfm->__crt_alg->cra_flags & CRYPTO_ALG_TYPE_MASK) { case CRYPTO_ALG_TYPE_AEAD: - chcr_handle_aead_resp(aead_request_cast(req), input, err); + err = chcr_handle_aead_resp(aead_request_cast(req), input, err); break; case CRYPTO_ALG_TYPE_ABLKCIPHER: - err = chcr_handle_cipher_resp(ablkcipher_request_cast(req), + chcr_handle_cipher_resp(ablkcipher_request_cast(req), input, err); break; - case CRYPTO_ALG_TYPE_AHASH: chcr_handle_ahash_resp(ahash_request_cast(req), input, err); } diff --git a/drivers/crypto/chelsio/chcr_core.c b/drivers/crypto/chelsio/chcr_core.c index e04b3e8fa623..239b933d6df6 100644 --- a/drivers/crypto/chelsio/chcr_core.c +++ b/drivers/crypto/chelsio/chcr_core.c @@ -169,12 +169,8 @@ static int cpl_fw6_pld_handler(struct chcr_dev *dev, ack_err_status = ntohl(*(__be32 *)((unsigned char *)&fw6_pld->data[0] + 4)); - if (ack_err_status) { - if (CHK_MAC_ERR_BIT(ack_err_status) || - CHK_PAD_ERR_BIT(ack_err_status)) - error_status = -EBADMSG; - atomic_inc(&adap->chcr_stats.error); - } + if (CHK_MAC_ERR_BIT(ack_err_status) || CHK_PAD_ERR_BIT(ack_err_status)) + error_status = -EBADMSG; /* call completion callback with failure status */ if (req) { error_status = chcr_handle_resp(req, input, error_status); @@ -182,6 +178,9 @@ static int cpl_fw6_pld_handler(struct chcr_dev *dev, pr_err("Incorrect request address from the firmware\n"); return -EFAULT; } + if (error_status) + atomic_inc(&adap->chcr_stats.error); + return 0; } |