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authorDan Carpenter <dan.carpenter@oracle.com>2017-08-04 11:17:21 +0300
committerDavid S. Miller <davem@davemloft.net>2017-08-04 10:55:54 -0700
commit5987feb38aa55e035ce5376c02aba88a604cc881 (patch)
tree04277f8d9b6056fff315c900bce3215ed866f9a6 /drivers
parent35615994c1f712946eb4c3d656a695336621e3df (diff)
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net: phy: marvell: logical vs bitwise OR typo
This was supposed to be a bitwise OR but there is a || vs | typo. Fixes: 864dc729d528 ("net: phy: marvell: Refactor m88e1121 RGMII delay configuration") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/phy/marvell.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 361fe9927ef2..15cbcdba618a 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -83,7 +83,7 @@
#define MII_88E1121_PHY_MSCR_REG 21
#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
-#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) || BIT(4)))
+#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
#define MII_88E1121_MISC_TEST 0x1a
#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00