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authorVladimir Zapolskiy <vz@mleia.com>2015-12-06 13:31:59 +0200
committerThierry Reding <thierry.reding@gmail.com>2015-12-16 17:00:01 +0100
commitebe1fca35038df28b5c183e8486863e765364ec1 (patch)
treeda5b252edc27ca2340640b1912b989bf82b83ae8 /drivers
parent5795980ab3a9448a972c303ba2d6459b72770a1a (diff)
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pwm: lpc32xx: correct number of PWM channels from 2 to 1
LPC32xx SoC has two independent PWM controllers, they have different clock parents, clock gates and even slightly different controls, and each of these two PWM controllers has one output channel. Due to almost similar controls arranged in a row it is incorrectly set that there is one PWM controller with two channels, fix this problem, which at the moment prevents separate configuration of different clock parents and gates for both PWM controllers. The change makes previous PWM device node description incompatible with this update. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pwm/pwm-lpc32xx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index 9fde60ce8e7b..ce8ab202be8b 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -134,7 +134,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
lpc32xx->chip.dev = &pdev->dev;
lpc32xx->chip.ops = &lpc32xx_pwm_ops;
- lpc32xx->chip.npwm = 2;
+ lpc32xx->chip.npwm = 1;
lpc32xx->chip.base = -1;
ret = pwmchip_add(&lpc32xx->chip);