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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-11-29 11:56:16 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-12-13 08:52:17 +0100 |
commit | 9a04bfc7594ccea27880292a6059725933610472 (patch) | |
tree | 1fbec11a85a1cd7d3e6ad96a727c3a02ca34433c /drivers | |
parent | 5f21842def7442706aa9ba7802b5c4287d6eaa3f (diff) | |
download | linux-stable-9a04bfc7594ccea27880292a6059725933610472.tar.gz linux-stable-9a04bfc7594ccea27880292a6059725933610472.tar.bz2 linux-stable-9a04bfc7594ccea27880292a6059725933610472.zip |
soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
[ Upstream commit b5eb730e031acaba2d25e8f522ac5966a70885ae ]
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp.
A2CN.
As these definitions are not yet used from DT, they can just be renamed.
While at it, fix the indentation of the A3IR definition.
Fixes: 833bdb47c826a1a6 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74fe9da96 ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/soc/renesas/r8a77970-sysc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/renesas/r8a77970-sysc.c b/drivers/soc/renesas/r8a77970-sysc.c index caf894f193ed..77422baa7a56 100644 --- a/drivers/soc/renesas/r8a77970-sysc.c +++ b/drivers/soc/renesas/r8a77970-sysc.c @@ -27,8 +27,8 @@ static const struct rcar_sysc_area r8a77970_areas[] __initconst = { { "a3ir", 0x180, 0, R8A77970_PD_A3IR, R8A77970_PD_ALWAYS_ON }, { "a2ir0", 0x400, 0, R8A77970_PD_A2IR0, R8A77970_PD_A3IR }, { "a2ir1", 0x400, 1, R8A77970_PD_A2IR1, R8A77970_PD_A3IR }, - { "a2ir2", 0x400, 2, R8A77970_PD_A2IR2, R8A77970_PD_A3IR }, - { "a2ir3", 0x400, 3, R8A77970_PD_A2IR3, R8A77970_PD_A3IR }, + { "a2dp", 0x400, 2, R8A77970_PD_A2DP, R8A77970_PD_A3IR }, + { "a2cn", 0x400, 3, R8A77970_PD_A2CN, R8A77970_PD_A3IR }, { "a2sc0", 0x400, 4, R8A77970_PD_A2SC0, R8A77970_PD_A3IR }, { "a2sc1", 0x400, 5, R8A77970_PD_A2SC1, R8A77970_PD_A3IR }, }; |