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| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2021-10-12 09:53:51 +0900 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-11-02 14:34:50 -0700 |
| commit | 4c4065c7a5f9d1b6492fc7a6da3a743578bc6f5f (patch) | |
| tree | 45363a6541ba524b4ceea67fbc4c6d95aee89035 /drivers | |
| parent | dd5e12802052d5f01ebb4c625aeee0aca58e664a (diff) | |
| download | linux-stable-4c4065c7a5f9d1b6492fc7a6da3a743578bc6f5f.tar.gz linux-stable-4c4065c7a5f9d1b6492fc7a6da3a743578bc6f5f.tar.bz2 linux-stable-4c4065c7a5f9d1b6492fc7a6da3a743578bc6f5f.zip | |
clk: uniphier: Add audio system and video input clock control for PXs3
Add clocks for audio subsystem (AIO) and video input subsystem (EXIV) on
UniPhier PXs3 SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1634000035-3114-2-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/uniphier/clk-uniphier-sys.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 32b301724183..0ec28ebc39c2 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -288,6 +288,8 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x210c, 7), UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x210c, 8), UNIPHIER_CLK_GATE("sata-phy", 30, NULL, 0x210c, 21), + UNIPHIER_LD11_SYS_CLK_AIO(40), + UNIPHIER_LD11_SYS_CLK_EXIV(42), /* CPU gears */ UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8), |