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| author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2017-03-14 08:23:26 -0700 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2017-03-23 10:10:39 +0100 |
| commit | a6566710adaa4a7dd5e0d99820ff9c9c30ee5951 (patch) | |
| tree | 6dc1d55210cfb979e026fdc3497d2cbfa67769fb /drivers | |
| parent | 59f34e80c4910bc69ca643a2bb93fcce51366d83 (diff) | |
| download | linux-stable-a6566710adaa4a7dd5e0d99820ff9c9c30ee5951.tar.gz linux-stable-a6566710adaa4a7dd5e0d99820ff9c9c30ee5951.tar.bz2 linux-stable-a6566710adaa4a7dd5e0d99820ff9c9c30ee5951.zip | |
pinctrl: qcom: Don't clear status bit on irq_unmask
Clearing the status bit on irq_unmask will discard any pending interrupt
that did arrive after the irq_ack, i.e. while the IRQ handler function
was executing.
Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
Cc: stable@vger.kernel.org
Cc: Stephen Boyd <sboyd@codeaurora.org>
Reported-by: Timur Tabi <timur@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-msm.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index c978be5eb9eb..273badd92561 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -609,10 +609,6 @@ static void msm_gpio_irq_unmask(struct irq_data *d) raw_spin_lock_irqsave(&pctrl->lock, flags); - val = readl(pctrl->regs + g->intr_status_reg); - val &= ~BIT(g->intr_status_bit); - writel(val, pctrl->regs + g->intr_status_reg); - val = readl(pctrl->regs + g->intr_cfg_reg); val |= BIT(g->intr_enable_bit); writel(val, pctrl->regs + g->intr_cfg_reg); |