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| author | Jeremy Linton <jeremy.linton@arm.com> | 2017-11-17 15:42:29 -0800 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2017-11-27 01:20:33 +0100 |
| commit | e3860b5ecff12770a45bd11c8d4fb8ac0fffcce1 (patch) | |
| tree | 3a8b416b1f8047bcd798d1a19af66f3ec85106fc /include/acpi/actbl1.h | |
| parent | 3e1dc644aa2fe816e6d91459dfd2e383e66be8c7 (diff) | |
| download | linux-stable-e3860b5ecff12770a45bd11c8d4fb8ac0fffcce1.tar.gz linux-stable-e3860b5ecff12770a45bd11c8d4fb8ac0fffcce1.tar.bz2 linux-stable-e3860b5ecff12770a45bd11c8d4fb8ac0fffcce1.zip | |
ACPICA: ACPI 6.2: Additional PPTT flags
ACPICA commit fba3ae99b2bc514ca34f0d7b2609c2a043582784
The ACPI 6.2 spec has flags to describe cache
allocation, write back, and whether
it is an instruction, data or unified cache.
Link: https://github.com/acpica/acpica/commit/fba3ae99
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/acpi/actbl1.h')
| -rw-r--r-- | include/acpi/actbl1.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h index 178661f1b896..4c304bf4d591 100644 --- a/include/acpi/actbl1.h +++ b/include/acpi/actbl1.h @@ -1441,6 +1441,20 @@ struct acpi_pptt_cache { #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ +/* Attributes describing cache */ +#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ +#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ +#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ +#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ + +#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ +#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ +#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ +#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ + +#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ +#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ + /* 2: ID Structure */ struct acpi_pptt_id { |