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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-12 13:41:29 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-12 13:41:29 -0700 |
commit | 0806ca2ab3ef7d7a1bd41a980f661a13ba11acb5 (patch) | |
tree | b0efd7382e59de26f173f61b677a579f3f4ee137 /include/asm-ia64 | |
parent | 21ba0f88ae56da82a3a15fe54d729208b64c4f4b (diff) | |
parent | 1612b18ccb2318563ba51268289dc3271a6052f7 (diff) | |
download | linux-stable-0806ca2ab3ef7d7a1bd41a980f661a13ba11acb5.tar.gz linux-stable-0806ca2ab3ef7d7a1bd41a980f661a13ba11acb5.tar.bz2 linux-stable-0806ca2ab3ef7d7a1bd41a980f661a13ba11acb5.zip |
Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] Support multiple CPUs going through OS_MCA
[IA64] silence GCC ia64 unused variable warnings
[IA64] prevent MCA when performing MMIO mmap to PCI config space
[IA64] add sn_register_pmi_handler oemcall
[IA64] Stop bit for brl instruction
[IA64] SN: Correct ROM resource length for BIOS copy
[IA64] Don't set psr.ic and psr.i simultaneously
Diffstat (limited to 'include/asm-ia64')
-rw-r--r-- | include/asm-ia64/mca.h | 1 | ||||
-rw-r--r-- | include/asm-ia64/sn/sn_sal.h | 20 |
2 files changed, 21 insertions, 0 deletions
diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h index 41098f459684..edd5d01028df 100644 --- a/include/asm-ia64/mca.h +++ b/include/asm-ia64/mca.h @@ -48,6 +48,7 @@ enum { IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0, IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1, IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2, + IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3, }; /* Information maintained by the MC infrastructure */ diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index d3566a298fa4..676b31a08c61 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h @@ -32,6 +32,7 @@ #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010 #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011 #define SN_SAL_PRINT_ERROR 0x02000012 +#define SN_SAL_REGISTER_PMI_HANDLER 0x02000014 #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant #define SN_SAL_GET_SAPIC_INFO 0x0200001d @@ -680,6 +681,25 @@ sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr, } /* + * Register or unregister a function to handle a PMI received by a CPU. + * Before calling the registered handler, SAL sets r1 to the value that + * was passed in as the global_pointer. + * + * If the handler pointer is NULL, then the currently registered handler + * will be unregistered. + * + * Returns 0 on success, or a negative value if an error occurred. + */ +static inline int +sn_register_pmi_handler(u64 handler, u64 global_pointer) +{ + struct ia64_sal_retval ret_stuff; + ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler, + global_pointer, 0, 0, 0, 0, 0); + return ret_stuff.status; +} + +/* * Change or query the coherence domain for this partition. Each cpu-based * nasid is represented by a bit in an array of 64-bit words: * 0 = not in this partition's coherency domain |