summaryrefslogtreecommitdiffstats
path: root/include/clocksource
diff options
context:
space:
mode:
authorFu Wei <fu.wei@linaro.org>2017-01-18 21:25:28 +0800
committerMark Rutland <mark.rutland@arm.com>2017-04-10 14:29:54 +0100
commit831610c08e63b69b141c446c78eb9e9315660a5d (patch)
tree94b9f1808f1a91c6273899f88585573cb2e5d26d /include/clocksource
parentee34f1e63d3d2b8df8607847eafbc859ec6818dc (diff)
downloadlinux-stable-831610c08e63b69b141c446c78eb9e9315660a5d.tar.gz
linux-stable-831610c08e63b69b141c446c78eb9e9315660a5d.tar.bz2
linux-stable-831610c08e63b69b141c446c78eb9e9315660a5d.zip
clocksource: arm_arch_timer: move enums and defines to header file
To support the arm_arch_timer via ACPI we need to share defines and enums between the driver and the ACPI parser code. So we split out the relevant defines and enums into arm_arch_timer.h. No functional change. Signed-off-by: Fu Wei <fu.wei@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Diffstat (limited to 'include/clocksource')
-rw-r--r--include/clocksource/arm_arch_timer.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
index caedb74c9210..b8986371159c 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -16,9 +16,13 @@
#ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
#define __CLKSOURCE_ARM_ARCH_TIMER_H
+#include <linux/bitops.h>
#include <linux/timecounter.h>
#include <linux/types.h>
+#define ARCH_TIMER_TYPE_CP15 BIT(0)
+#define ARCH_TIMER_TYPE_MEM BIT(1)
+
#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
#define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
#define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
@@ -34,6 +38,14 @@ enum arch_timer_reg {
ARCH_TIMER_REG_TVAL,
};
+enum arch_timer_ppi_nr {
+ ARCH_TIMER_PHYS_SECURE_PPI,
+ ARCH_TIMER_PHYS_NONSECURE_PPI,
+ ARCH_TIMER_VIRT_PPI,
+ ARCH_TIMER_HYP_PPI,
+ ARCH_TIMER_MAX_TIMER_PPI
+};
+
#define ARCH_TIMER_PHYS_ACCESS 0
#define ARCH_TIMER_VIRT_ACCESS 1
#define ARCH_TIMER_MEM_PHYS_ACCESS 2