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author | Dave Airlie <airlied@redhat.com> | 2017-10-12 10:20:03 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2017-10-12 10:20:03 +1000 |
commit | c5c7bc71a0e6bc382744497e45c6c70503f9d7e6 (patch) | |
tree | 35a00018aa6165ce0c17e2e2d4aa398ffea119bc /include/drm | |
parent | 418da17214aca5ef5f0b6f7588905ee7df92f98f (diff) | |
parent | e18063e88bd579c479a2b45820be6c4625f841c3 (diff) | |
download | linux-stable-c5c7bc71a0e6bc382744497e45c6c70503f9d7e6.tar.gz linux-stable-c5c7bc71a0e6bc382744497e45c6c70503f9d7e6.tar.bz2 linux-stable-c5c7bc71a0e6bc382744497e45c6c70503f9d7e6.zip |
Merge tag 'drm-intel-next-2017-09-29' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
2nd batch of v4.15 features:
- lib/scatterlist updates, use for userptr allocations (Tvrtko)
- Fixed point wrapper cleanup (Mahesh)
- Gen9+ transition watermarks, watermark optimization and fixes (Mahesh)
- Display IPC (Isochronous Priority Control) support (Mahesh)
- GEM workaround fixes (Oscar)
- GVT: PCI config sanitize series (Changbin)
- GVT: Workload submission error handling series (Fred)
- PSR fixes and refactoring (Rodrigo)
- HWSP based optimizations (Chris)
- Private PAT management (Zhi)
- IRQ handling fixes and refactoring (Ville)
- Module parameter refactoring and variable name clash fix (Michal)
- Execlist refactoring, incomplete request unwinding on reset (Chris)
- GuC scheduling improvements (Michal)
- OA updates (Lionel)
- Coffeelake out of alpha support (Rodrigo)
- seqno fixes (Chris)
- Execlist refactoring (Mika)
- DP and DP MST cleanups (Dhinakaran)
- Cannonlake slice/sublice config (Ben)
- Numerous fixes all around (Everyone)
* tag 'drm-intel-next-2017-09-29' of git://anongit.freedesktop.org/drm/drm-intel: (168 commits)
drm/i915: Update DRIVER_DATE to 20170929
drm/i915: Use memset64() to prefill the GTT page
drm/i915: Also discard second CRC on gen8+ platforms.
drm/i915/psr: Set frames before SU entry for psr2
drm/dp: Add defines for latency in sink
drm/i915: Allow optimized platform checks
drm/i915: Avoid using dev_priv->info.gen directly.
i915: Use %pS printk format for direct addresses
drm/i915/execlists: Notify context-out for lost requests
drm/i915/cnl: Add support slice/subslice/eu configs
drm/i915: Compact device info access by a small re-ordering
drm/i915: Add IS_PLATFORM macro
drm/i915/selftests: Try to recover from a wedged GPU during reset tests
drm/i915/huc: Reorganize HuC authentication
drm/i915: Fix default values of some modparams
drm/i915: Extend I915_PARAMS_FOR_EACH with default member value
drm/i915: Make I915_PARAMS_FOR_EACH macro more flexible
drm/i915: Enable scanline read based on frame timestamps
drm/i915/execlists: Microoptimise execlists_cancel_port_request()
drm/i915: Don't rmw PIPESTAT enable bits
...
Diffstat (limited to 'include/drm')
-rw-r--r-- | include/drm/drm_dp_helper.h | 6 | ||||
-rw-r--r-- | include/drm/i915_pciids.h | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 11c39f15f1b3..8b9ac321c3bd 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -735,6 +735,12 @@ # define DP_PSR_SINK_INTERNAL_ERROR 7 # define DP_PSR_SINK_STATE_MASK 0x07 +#define DP_SYNCHRONIZATION_LATENCY_IN_SINK 0x2009 /* edp 1.4 */ +# define DP_MAX_RESYNC_FRAME_COUNT_MASK (0xf << 0) +# define DP_MAX_RESYNC_FRAME_COUNT_SHIFT 0 +# define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_MASK (0xf << 4) +# define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_SHIFT 4 + #define DP_RECEIVER_ALPM_STATUS 0x200b /* eDP 1.4 */ # define DP_ALPM_LOCK_TIMEOUT_ERROR (1 << 0) diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 1257e15c1a03..972a25633525 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -339,7 +339,6 @@ #define INTEL_KBL_GT1_IDS(info) \ INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \ INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \ - INTEL_VGA_DEVICE(0x5917, info), /* DT GT1.5 */ \ INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \ INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \ INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \ @@ -349,6 +348,7 @@ #define INTEL_KBL_GT2_IDS(info) \ INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ + INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \ INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \ INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ |