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authorElaine Zhang <zhangqing@rock-chips.com>2017-08-02 16:29:48 +0800
committerHeiko Stuebner <heiko@sntech.de>2017-08-06 19:43:35 +0200
commit1b6428a286ae3577b2ba3328a054115d561b8650 (patch)
tree77f0fb4414019db88fa5ad3402125249d63e7203 /include/dt-bindings
parentcbbd6c2f551c27199c90f680851609f888a3048b (diff)
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clk: rockchip: rename the clk id for HCLK_I2S1_2CH
i2s1 has 2 channels but not 8 channels. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> [and the clock id hasn't been used in either clock-driver nor dts, so is safe to rename] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/rv1108-cru.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h
index fe013cf51e2b..e8aa6d56990a 100644
--- a/include/dt-bindings/clock/rv1108-cru.h
+++ b/include/dt-bindings/clock/rv1108-cru.h
@@ -144,7 +144,7 @@
/* hclk gates */
#define HCLK_I2S0_8CH 320
-#define HCLK_I2S1_8CH 321
+#define HCLK_I2S1_2CH 321
#define HCLK_I2S2_2CH 322
#define HCLK_NANDC 323
#define HCLK_SDMMC 324