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authorBibby Hsieh <bibby.hsieh@mediatek.com>2019-08-29 09:48:12 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-10-07 18:59:19 +0200
commit15786d677bbc22a7a02fa2f6c443fe1e36b5af7b (patch)
tree7ffca025cade0bd15ad9636f56fcc855d7b45ce3 /include/linux/mailbox/mtk-cmdq-mailbox.h
parent1496f3d159342350e6aba4e2a89a0a5874f0d10d (diff)
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mailbox: mediatek: cmdq: clear the event in cmdq initial flow
[ Upstream commit 6058f11870b8e6d4f5cc7b591097c00bf69a000d ] GCE hardware stored event information in own internal sysram, if the initial value in those sysram is not zero value it will cause a situation that gce can wait the event immediately after client ask gce to wait event but not really trigger the corresponding hardware. In order to make sure that the wait event function is exactly correct, we need to clear the sysram value in cmdq initial flow. Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver") Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include/linux/mailbox/mtk-cmdq-mailbox.h')
-rw-r--r--include/linux/mailbox/mtk-cmdq-mailbox.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
index ccb73422c2fa..e6f54ef6698b 100644
--- a/include/linux/mailbox/mtk-cmdq-mailbox.h
+++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
@@ -20,6 +20,9 @@
#define CMDQ_WFE_WAIT BIT(15)
#define CMDQ_WFE_WAIT_VALUE 0x1
+/** cmdq event maximum */
+#define CMDQ_MAX_EVENT 0x3ff
+
/*
* CMDQ_CODE_MASK:
* set write mask