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| author | Axel Lin <axel.lin@ingics.com> | 2012-11-20 10:34:56 +0800 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-11-26 12:10:51 +0100 |
| commit | 3f9be35bd9090eaa2f68ed9b24efdbf3abcf4b28 (patch) | |
| tree | b2a5647e0f05fb5415f315a24700d12ccfa9b2ff /include/linux/mfd/rc5t583.h | |
| parent | 302b95621dc96651187c21fd66e5a44860e4c3b1 (diff) | |
| download | linux-stable-3f9be35bd9090eaa2f68ed9b24efdbf3abcf4b28.tar.gz linux-stable-3f9be35bd9090eaa2f68ed9b24efdbf3abcf4b28.tar.bz2 linux-stable-3f9be35bd9090eaa2f68ed9b24efdbf3abcf4b28.zip | |
mfd: rc5t583: Fix array subscript is above array bounds
I got below build warning while compiling this driver.
It's obviously RC5T583_MAX_INTERRUPT_MASK_REGS is 9 but irq_en_add
array only has 8 elements.
CC drivers/mfd/rc5t583-irq.o
drivers/mfd/rc5t583-irq.c: In function 'rc5t583_irq_sync_unlock':
drivers/mfd/rc5t583-irq.c:227: warning: array subscript is above array bounds
drivers/mfd/rc5t583-irq.c: In function 'rc5t583_irq_init':
drivers/mfd/rc5t583-irq.c:349: warning: array subscript is above array bounds
Since the number of interrupt enable registers is 8, this patch adds
define for RC5T583_MAX_INTERRUPT_EN_REGS to fix this bug.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux/mfd/rc5t583.h')
| -rw-r--r-- | include/linux/mfd/rc5t583.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mfd/rc5t583.h b/include/linux/mfd/rc5t583.h index 36c242e52ef1..fd413ccab915 100644 --- a/include/linux/mfd/rc5t583.h +++ b/include/linux/mfd/rc5t583.h @@ -33,6 +33,7 @@ /* Maximum number of main interrupts */ #define MAX_MAIN_INTERRUPT 5 #define RC5T583_MAX_GPEDGE_REG 2 +#define RC5T583_MAX_INTERRUPT_EN_REGS 8 #define RC5T583_MAX_INTERRUPT_MASK_REGS 9 /* Interrupt enable register */ @@ -304,7 +305,7 @@ struct rc5t583 { uint8_t intc_inten_reg; /* For group interrupt bits and address */ - uint8_t irq_en_reg[RC5T583_MAX_INTERRUPT_MASK_REGS]; + uint8_t irq_en_reg[RC5T583_MAX_INTERRUPT_EN_REGS]; /* For gpio edge */ uint8_t gpedge_reg[RC5T583_MAX_GPEDGE_REG]; |