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authorKrzysztof Kozlowski <krzk@kernel.org>2017-03-29 13:59:57 +0530
committerKishon Vijay Abraham I <kishon@ti.com>2017-04-10 16:43:18 +0530
commit7a66647b25b68c2a2da51bc9845fc91dd27529a9 (patch)
tree46a61e8859ba74bb5cbd6023d4aebcf7b46cb11e /include/linux/soc
parent33e9a6aab6f3469ca8a592113e6edc0b2b7bbbb5 (diff)
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phy: exynos: Use one define for enable bit
There is no need for separate defines for Exynos4 and Exynos5 phy enable bit and MIPI phy reset bits. In both cases there are the same so simplify it. This reduces number of defines and allows removal of one header file. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'include/linux/soc')
-rw-r--r--include/linux/soc/samsung/exynos-regs-pmu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h
index c261ed927e1e..bebdde5dccd6 100644
--- a/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@ -52,7 +52,8 @@
/* MIPI_PHYn_CONTROL, valid for Exynos3250, Exynos4, Exynos5250 and Exynos5433 */
#define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
-#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0)
+/* Phy enable bit, common for all phy registers, not only MIPI */
+#define EXYNOS4_PHY_ENABLE (1 << 0)
#define EXYNOS4_MIPI_PHY_SRESETN (1 << 1)
#define EXYNOS4_MIPI_PHY_MRESETN (1 << 2)
#define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1)