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| author | Peter Zijlstra <peterz@infradead.org> | 2013-09-09 13:26:36 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2013-09-12 19:12:27 +0200 |
| commit | 06c939c1f41b1c28bb17fae074ad610e22a01db8 (patch) | |
| tree | fe68e612733c49b05ba9712f311006082544f4a8 /include/uapi | |
| parent | dbc33f7016747bfce64f3d1e3af63f1251fcbf85 (diff) | |
| download | linux-stable-06c939c1f41b1c28bb17fae074ad610e22a01db8.tar.gz linux-stable-06c939c1f41b1c28bb17fae074ad610e22a01db8.tar.bz2 linux-stable-06c939c1f41b1c28bb17fae074ad610e22a01db8.zip | |
perf/x86/intel: Fix Silvermont offcore masks
Fengguang Wu reported:
> sparse warnings: (new ones prefixed by >>)
>
> >> arch/x86/kernel/cpu/perf_event_intel.c:901:9: sparse: constant 0x768005ffff is so big it is long
> >> arch/x86/kernel/cpu/perf_event_intel.c:902:9: sparse: constant 0x768005ffff is so big it is long
>
> vim +901 arch/x86/kernel/cpu/perf_event_intel.c
>
> 895 },
> 896 };
> 897
> 898 static struct extra_reg intel_slm_extra_regs[] __read_mostly =
> 899 {
> 900 /* must define OFFCORE_RSP_X first, see intel_fixup_er() */
> > 901 INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x768005ffff, RSP_0),
> > 902 INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x768005ffff, RSP_1),
> 903 EVENT_EXTRA_END
> 904 };
> 905
Extend those constants to 64 bits.
Reported-by: fengguang.wu@intel.com
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20130909112636.GQ31370@twins.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'include/uapi')
0 files changed, 0 insertions, 0 deletions