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| author | Keith Busch <keith.busch@intel.com> | 2017-02-03 16:46:13 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-02-10 14:36:14 -0600 |
| commit | abdbf4d635a9a8c956bb9757a9d4f08c2abe1f97 (patch) | |
| tree | 505f28df23e7cf1413c3537f258f722f2627492d /include/uapi | |
| parent | 87b336d003d47876e376d943be3c9d35152f3b86 (diff) | |
| download | linux-stable-abdbf4d635a9a8c956bb9757a9d4f08c2abe1f97.tar.gz linux-stable-abdbf4d635a9a8c956bb9757a9d4f08c2abe1f97.tar.bz2 linux-stable-abdbf4d635a9a8c956bb9757a9d4f08c2abe1f97.zip | |
PCI/DPC: Wait for Root Port busy to clear
Per PCIe r3.1, sec 6.2.10 and sec 7.13.4, on Root Ports that support "RP
Extensions for DPC",
When the DPC Trigger Status bit is Set and the DPC RP Busy bit is Set,
software must leave the Root Port in DPC until the DPC RP Busy bit reads
0b.
Wait up to 1 second for the Root Port to become non-busy.
[bhelgaas: changelog, spec references]
Signed-off-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/linux/pci_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 174d1147081b..c1b94b044795 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -973,6 +973,7 @@ #define PCI_EXP_DPC_STATUS 8 /* DPC Status */ #define PCI_EXP_DPC_STATUS_TRIGGER 0x01 /* Trigger Status */ #define PCI_EXP_DPC_STATUS_INTERRUPT 0x08 /* Interrupt Status */ +#define PCI_EXP_DPC_RP_BUSY 0x10 /* Root Port Busy */ #define PCI_EXP_DPC_SOURCE_ID 10 /* DPC Source Identifier */ |