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author | Dmitry Osipenko <digetx@gmail.com> | 2018-12-12 23:38:55 +0300 |
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committer | Joerg Roedel <jroedel@suse.de> | 2019-01-16 13:54:12 +0100 |
commit | 45594c683ef780f20f11b1e0018b933b6ff5d9a1 (patch) | |
tree | 7160fd685824a20d2d7ace75e4c9dfa002b55029 /include | |
parent | 59cd046f7f94543540d82216dbbfd8146db43b70 (diff) | |
download | linux-stable-45594c683ef780f20f11b1e0018b933b6ff5d9a1.tar.gz linux-stable-45594c683ef780f20f11b1e0018b933b6ff5d9a1.tar.bz2 linux-stable-45594c683ef780f20f11b1e0018b933b6ff5d9a1.zip |
memory: tegra: Use relaxed versions of readl/writel
There is no need for inserting of memory barriers to access registers of
Memory Controller. Hence use the relaxed versions of the accessors.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions