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authorBhadram Varka <vbhadram@nvidia.com>2017-11-02 12:52:13 +0530
committerDavid S. Miller <davem@davemloft.net>2017-11-03 14:15:06 +0900
commite73b49ebd9deeb0ff2cd9ac6fd9c72a433d1e062 (patch)
tree5aa5da74e4cc208dd7136dce59cebe288e04850b /include
parent2f2b1ae24ce69c7cb03f80a2b77dfd3f9d164626 (diff)
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stmmac: use of_property_read_u32 instead of read_u8
Numbers in DT are stored in “cells” which are 32-bits in size. of_property_read_u8 does not work properly because of endianness problem. This causes it to always return 0 with little-endian architectures. Fix it by using of_property_read_u32() OF API. Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/linux/stmmac.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 108739ff9223..32feac5bbd75 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -126,14 +126,14 @@ struct stmmac_axi {
struct stmmac_rxq_cfg {
u8 mode_to_use;
- u8 chan;
+ u32 chan;
u8 pkt_route;
bool use_prio;
u32 prio;
};
struct stmmac_txq_cfg {
- u8 weight;
+ u32 weight;
u8 mode_to_use;
/* Credit Base Shaper parameters */
u32 send_slope;
@@ -168,8 +168,8 @@ struct plat_stmmacenet_data {
int unicast_filter_entries;
int tx_fifo_size;
int rx_fifo_size;
- u8 rx_queues_to_use;
- u8 tx_queues_to_use;
+ u32 rx_queues_to_use;
+ u32 tx_queues_to_use;
u8 rx_sched_algorithm;
u8 tx_sched_algorithm;
struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];