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| author | Olof Johansson <olof@lixom.net> | 2013-07-22 19:58:02 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-07-22 19:58:02 -0700 |
| commit | d757380c11018e7921324af094aee8dc979f223a (patch) | |
| tree | c7387b0650839509933abb031e4dd9b869b0e2c9 /include | |
| parent | 9d0b375089284186116a0745d862ec713f920d9e (diff) | |
| parent | 84bb08472520882394fe16d7a3548793302563de (diff) | |
| download | linux-stable-d757380c11018e7921324af094aee8dc979f223a.tar.gz linux-stable-d757380c11018e7921324af094aee8dc979f223a.tar.bz2 linux-stable-d757380c11018e7921324af094aee8dc979f223a.zip | |
Merge tag 'imx-fixes-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.11:
- A few device tree source fixes regarding pinctrl, clock, and pwm
backlight.
- Fixes imx28 and imx51 audio driver failure caused by sgtl5000 codec
driver change by supplying the correct clock for codec.
- imx6q emi_sel clock muxing and imx6q-iomuxc-gpr macro fixes
* tag 'imx-fixes-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: dts: imx51-babbage: Pass a real clock to the codec
ARM i.MX53: mba53: Fix PWM backlight DT node
ARM: imx: fix vf610 enet module clock selection
ARM: mxs: saif0 is the clock provider to sgtl5000
ARM: i.MX6Q: correct emi_sel clock muxing
ARM i.MX6Q: Fix IOMUXC GPR1 defines for ENET_CLK_SEL and IPU1/2_MUX
ARM: i.MX27: Typo fix
ARM: imx27: Fix documentation for SPLL clock
ARM i.MX53: Fix UART pad configuration
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/vf610-clock.h | 4 | ||||
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 16 |
2 files changed, 11 insertions, 9 deletions
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h index 15e997fa78f2..4aa2b48cd151 100644 --- a/include/dt-bindings/clock/vf610-clock.h +++ b/include/dt-bindings/clock/vf610-clock.h @@ -158,6 +158,8 @@ #define VF610_CLK_GPU_SEL 145 #define VF610_CLK_GPU_EN 146 #define VF610_CLK_GPU2D 147 -#define VF610_CLK_END 148 +#define VF610_CLK_ENET0 148 +#define VF610_CLK_ENET1 149 +#define VF610_CLK_END 150 #endif /* __DT_BINDINGS_CLOCK_VF610_H */ diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index dab34a1deb2c..b1521e82fecf 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -103,15 +103,15 @@ #define IMX6Q_GPR1_EXC_MON_MASK BIT(22) #define IMX6Q_GPR1_EXC_MON_OKAY 0x0 #define IMX6Q_GPR1_EXC_MON_SLVE BIT(22) -#define IMX6Q_GPR1_MIPI_IPU2_SEL_MASK BIT(21) -#define IMX6Q_GPR1_MIPI_IPU2_SEL_GASKET 0x0 -#define IMX6Q_GPR1_MIPI_IPU2_SEL_IOMUX BIT(21) -#define IMX6Q_GPR1_MIPI_IPU1_MUX_MASK BIT(20) -#define IMX6Q_GPR1_MIPI_IPU1_MUX_GASKET 0x0 -#define IMX6Q_GPR1_MIPI_IPU1_MUX_IOMUX BIT(20) -#define IMX6Q_GPR1_MIPI_IPU2_MUX_MASK BIT(19) +#define IMX6Q_GPR1_ENET_CLK_SEL_MASK BIT(21) +#define IMX6Q_GPR1_ENET_CLK_SEL_PAD 0 +#define IMX6Q_GPR1_ENET_CLK_SEL_ANATOP BIT(21) +#define IMX6Q_GPR1_MIPI_IPU2_MUX_MASK BIT(20) #define IMX6Q_GPR1_MIPI_IPU2_MUX_GASKET 0x0 -#define IMX6Q_GPR1_MIPI_IPU2_MUX_IOMUX BIT(19) +#define IMX6Q_GPR1_MIPI_IPU2_MUX_IOMUX BIT(20) +#define IMX6Q_GPR1_MIPI_IPU1_MUX_MASK BIT(19) +#define IMX6Q_GPR1_MIPI_IPU1_MUX_GASKET 0x0 +#define IMX6Q_GPR1_MIPI_IPU1_MUX_IOMUX BIT(19) #define IMX6Q_GPR1_PCIE_TEST_PD BIT(18) #define IMX6Q_GPR1_IPU_VPU_MUX_MASK BIT(17) #define IMX6Q_GPR1_IPU_VPU_MUX_IPU1 0x0 |