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| author | Suthikulpanit, Suravee <Suravee.Suthikulpanit@amd.com> | 2019-03-20 08:12:28 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-04-27 09:35:37 +0200 |
| commit | c197e4693aca226675ffdce69ee5638842fbdfe6 (patch) | |
| tree | 80d36fa08fb97d5f4f4fb0c4762a4166553da47d /include | |
| parent | bc6b83db8f5ae658f1db0855bcc03c8366b9084e (diff) | |
| download | linux-stable-c197e4693aca226675ffdce69ee5638842fbdfe6.tar.gz linux-stable-c197e4693aca226675ffdce69ee5638842fbdfe6.tar.bz2 linux-stable-c197e4693aca226675ffdce69ee5638842fbdfe6.zip | |
Revert "svm: Fix AVIC incomplete IPI emulation"
commit 4a58038b9e420276157785afa0a0bbb4b9bc2265 upstream.
This reverts commit bb218fbcfaaa3b115d4cd7a43c0ca164f3a96e57.
As Oren Twaig pointed out the old discussion:
https://patchwork.kernel.org/patch/8292231/
that the change coud potentially cause an extra IPI to be sent to
the destination vcpu because the AVIC hardware already set the IRR bit
before the incomplete IPI #VMEXIT with id=1 (target vcpu is not running).
Since writting to ICR and ICR2 will also set the IRR. If something triggers
the destination vcpu to get scheduled before the emulation finishes, then
this could result in an additional IPI.
Also, the issue mentioned in the commit bb218fbcfaaa was misdiagnosed.
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Reported-by: Oren Twaig <oren@scalemp.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions