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| author | Or Gerlitz <ogerlitz@mellanox.com> | 2016-11-30 20:33:33 +0200 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@mellanox.com> | 2017-01-24 21:14:06 +0200 |
| commit | 7898489880f55a9c3a954cd5660a0fb4fd81b625 (patch) | |
| tree | 8278b5f03da69a07f000c71cf637190c34aadbce /include | |
| parent | 8c7245a60ef8f8c4a427349690c5a141cfed6217 (diff) | |
| download | linux-stable-7898489880f55a9c3a954cd5660a0fb4fd81b625.tar.gz linux-stable-7898489880f55a9c3a954cd5660a0fb4fd81b625.tar.bz2 linux-stable-7898489880f55a9c3a954cd5660a0fb4fd81b625.zip | |
IB/mlx5: Enable Eth VFs to query their min-inline value for user-space
For some mlx5 HW models (CX4, CX4Lx), the VF driver needs to put part
of the packet headers on the TX descriptor so the e-switch can do proper
matching and steering. This is called "min-inline", it's advertized to
the VF by the FW and also enforced on them by the HW, such that if they
don't obey, their packets are dropped.
SRIOV VF libmlx5 instances should take into account the min-inline
value of their vports. For that end, we provide this value through
the vendor response part of init_ucontext command.
The min inline value is reported in a way which will let newer libmlx5
instances realize that they are running over an older kernel and act
accordingly (e.g apply some educated guess).
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Reviewed-by: Matan Barak <matanb@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/uapi/rdma/mlx5-abi.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/include/uapi/rdma/mlx5-abi.h b/include/uapi/rdma/mlx5-abi.h index 85dc966ea70b..da7cd62bace7 100644 --- a/include/uapi/rdma/mlx5-abi.h +++ b/include/uapi/rdma/mlx5-abi.h @@ -90,6 +90,17 @@ enum mlx5_user_cmds_supp_uhw { MLX5_USER_CMDS_SUPP_UHW_CREATE_AH = 1 << 1, }; +/* The eth_min_inline response value is set to off-by-one vs the FW + * returned value to allow user-space to deal with older kernels. + */ +enum mlx5_user_inline_mode { + MLX5_USER_INLINE_MODE_NA, + MLX5_USER_INLINE_MODE_NONE, + MLX5_USER_INLINE_MODE_L2, + MLX5_USER_INLINE_MODE_IP, + MLX5_USER_INLINE_MODE_TCP_UDP, +}; + struct mlx5_ib_alloc_ucontext_resp { __u32 qp_tab_size; __u32 bf_reg_size; @@ -106,7 +117,8 @@ struct mlx5_ib_alloc_ucontext_resp { __u32 response_length; __u8 cqe_version; __u8 cmds_supp_uhw; - __u16 reserved2; + __u8 eth_min_inline; + __u8 reserved2; __u64 hca_core_clock_offset; __u32 log_uar_size; __u32 num_uars_per_page; |