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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-03-09 17:50:02 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-03-09 17:50:02 -0700 |
| commit | d08edd8f09a0bc7f28c9559d134ffc37ff264962 (patch) | |
| tree | 527d857382761d626a3a1283077ed33a1fef5c01 /include | |
| parent | eca8dac4fa477cb26eb6478f4a5d2cf381128753 (diff) | |
| parent | 60c1beeff40b04097298e10640580f62420a55ca (diff) | |
| download | linux-stable-d08edd8f09a0bc7f28c9559d134ffc37ff264962.tar.gz linux-stable-d08edd8f09a0bc7f28c9559d134ffc37ff264962.tar.bz2 linux-stable-d08edd8f09a0bc7f28c9559d134ffc37ff264962.zip | |
Merge tag 'spi-v4.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
"A collection of driver specific fixes to which the usual comments
about them being important if you see them mostly apply (except for
the comment fix). The pl022 one is particularly nasty for anyone
affected by it"
* tag 'spi-v4.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: pl022: Fix race in giveback() leading to driver lock-up
spi: dw-mid: avoid potential NULL dereference
spi: img-spfi: Verify max spfi transfer length
spi: fix a typo in comment.
spi: atmel: Fix interrupt setup for PDC transfers
spi: dw: revisit FIFO size detection again
spi: dw-pci: correct number of chip selects
drivers: spi: ti-qspi: wait for busy bit clear before data write/read
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/spi/spi.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index ed9489d893a4..856d34dde79b 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -649,7 +649,7 @@ struct spi_transfer { * sequence completes. On some systems, many such sequences can execute as * as single programmed DMA transfer. On all systems, these messages are * queued, and might complete after transactions to other devices. Messages - * sent to a given spi_device are alway executed in FIFO order. + * sent to a given spi_device are always executed in FIFO order. * * The code that submits an spi_message (and its spi_transfers) * to the lower layers is responsible for managing its memory. |