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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-14 16:36:51 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-14 16:36:51 -0700 |
| commit | fde7dc63b1caa6dedf9af7cbf79895589629bc95 (patch) | |
| tree | b719b754a9b65be628a30a2a9cc041d0f43eeaf6 /include | |
| parent | a1240cf74e8228f7c80d44af17914c0ffc5633fb (diff) | |
| parent | 25777e5784a7b417967460d4fcf9660d05a0c320 (diff) | |
| download | linux-stable-fde7dc63b1caa6dedf9af7cbf79895589629bc95.tar.gz linux-stable-fde7dc63b1caa6dedf9af7cbf79895589629bc95.tar.bz2 linux-stable-fde7dc63b1caa6dedf9af7cbf79895589629bc95.zip | |
Merge tag 'mailbox-v5.3' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:
- stm32: race fix by adding a spinlock
- mhu: trim included headers
- omap: add support for K3 SoCs
- imx: Irq disable fix
- bcm: tidy up extracting driver data
- tegra: make resume 'noirq'
- api: fix error handling
* tag 'mailbox-v5.3' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
mailbox: handle failed named mailbox channel request
mailbox: tegra: avoid resume NULL mailboxes
mailbox: tegra: hsp: add noirq resume
mailbox: bcm-flexrm-mailbox: using dev_get_drvdata directly
mailbox: imx: Clear GIEn bit at shutdown
mailbox: omap: Add support for TI K3 SoCs
dt-bindings: mailbox: omap: Update bindings for TI K3 SoCs
mailbox: arm_mhu: reorder header inclusion and drop unneeded ones
mailbox: stm32_ipcc: add spinlock to fix channels concurrent access
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/omap-mailbox.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/omap-mailbox.h b/include/linux/omap-mailbox.h index 6dbcd2da0332..8aa984ec1f38 100644 --- a/include/linux/omap-mailbox.h +++ b/include/linux/omap-mailbox.h @@ -6,7 +6,9 @@ #ifndef OMAP_MAILBOX_H #define OMAP_MAILBOX_H -typedef u32 mbox_msg_t; +typedef uintptr_t mbox_msg_t; + +#define omap_mbox_message(data) (u32)(mbox_msg_t)(data) typedef int __bitwise omap_mbox_irq_t; #define IRQ_TX ((__force omap_mbox_irq_t) 1) |