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| author | Ben Ben-Ishay <benishay@nvidia.com> | 2022-03-02 17:07:08 +0200 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2022-03-09 11:39:35 -0800 |
| commit | 99a2b9be077ae3a5d97fbf5f7782e0f2e9812978 (patch) | |
| tree | 5c68d8af068790aa0900184f959bee11f5e27861 /include | |
| parent | ad11c4f1d8fd1f03639460e425a36f7fd0ea83f5 (diff) | |
| download | linux-stable-99a2b9be077ae3a5d97fbf5f7782e0f2e9812978.tar.gz linux-stable-99a2b9be077ae3a5d97fbf5f7782e0f2e9812978.tar.bz2 linux-stable-99a2b9be077ae3a5d97fbf5f7782e0f2e9812978.zip | |
net/mlx5e: SHAMPO, reduce TIR indication
SHAMPO is an RQ / WQ feature, an indication was added to the TIR in the
first place to enforce suitability between connected TIR and RQ, this
enforcement does not exist in current the Firmware implementation and was
redundant in the first place.
Fixes: 83439f3c37aa ("net/mlx5e: Add HW-GRO offload")
Signed-off-by: Ben Ben-Ishay <benishay@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 5743f5b3414b..49a48d7709ac 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -3434,7 +3434,6 @@ enum { enum { MLX5_TIRC_PACKET_MERGE_MASK_IPV4_LRO = BIT(0), MLX5_TIRC_PACKET_MERGE_MASK_IPV6_LRO = BIT(1), - MLX5_TIRC_PACKET_MERGE_MASK_SHAMPO = BIT(2), }; enum { |