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authorAndrew Bresticker <abrestic@chromium.org>2013-09-25 14:12:49 -0700
committerTomasz Figa <t.figa@samsung.com>2014-01-08 18:02:42 +0100
commit35399dda011b515120e0c39463ac32f0cac75c6a (patch)
treed3117a0bf64baa1b1841570ed61af2cbd25f3cf0 /lib
parent547f33509ccc6e016df02600d377778b75e26a7b (diff)
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clk: exynos5250: add clock ID for div_pcm0
There is no gate for the PCM clock input to the AudioSS block, so the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that we can reference it in device trees. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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