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authorBrian Brooks <brian.brooks@linaro.org>2018-07-25 16:08:19 -0500
committerDaniel Borkmann <daniel@iogearbox.net>2018-07-27 03:49:02 +0200
commit598135e7444c121f11c8c16495ba1e6ab122678f (patch)
tree6e13ac796fad3cad2a7a1662a8364c93e70bcf98 /samples/bpf/tracex1_kern.c
parent08a852528e9678f0854af331f19747f2b2a73c06 (diff)
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samples/bpf: xdpsock: order memory on AArch64
Define u_smp_rmb() and u_smp_wmb() to respective barrier instructions. This ensures the processor will order accesses to queue indices against accesses to queue ring entries. Signed-off-by: Brian Brooks <brian.brooks@linaro.org> Acked-by: Björn Töpel <bjorn.topel@intel.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
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